Altera Transceiver Signal Integrity Development Kit, Stratix IV GT Edition - Manual (Page 8)

1–4 Chapter 1: Overview
Development Board Block Diagram
Transceiver Signal Integrity Development Kit, November 2011 Altera Corporation
Stratix IV GT Edition Reference Manual
Development Board Block Diagram
Figure 1–1 shows the block diagram of the Stratix IV GT transceiver signal integrity
board.
Figure 1–1. Stratix IV GT Transceiver Signal Integrity Board Block Diagram
GT
LCD
Power
Measure
24-bit
ADC
Dual Temp
Sensor
Temp
Measure
TDIODES
5-V FAN
USB-Blaster
USB
Type-B
Conn
USB
PHY
MAX
7064A
CPLD
10/100/1000
Ethernet
RJ45
Magnetics
SMSC
8700
Ethernet
PHY
FPP
Configuration
Clock
Circuitry
512-Mbit
Flash
Configuration
Status
LEDs MAX
7256A
CPLD
PGMSEL
Jumper
2 Reset
Buttons
Buttons
Switches
Displays
Rotary
Switch
16 Char × 2 Line LCD
8 User DIP
6 User
Buttons
8 User
LEDs
Transceivers
Flash
FPP Config
2-wire Ch1
Power
Circuitry
2-wire Ch8
EP4S100G2F40I2N
Backplane
Connectors
ADC
Header
Pwrgood
TEMP