Altera Arria V GX Starter Board - Manual (Page 6)

1–2 Chapter 1: Overview
Board Component Blocks
Arria V GX Starter Board November 2013 Altera Corporation
Reference Manual
Board Component Blocks
The starter board features the following major component blocks:
■ One Arria V GX 5AGXFB3H4F35C4N FPGA in a 1152-pin FineLine BGA (FBGA)
package
■ 362,000 LEs
■ 136,880 adaptive logic modules (ALMs)
■ 17,260 Kbit on-die block memory
■ 24 high-speed transceivers
■ 12 fractional phase locked loops (PLLs)
■ 2,090 18x19 multipliers
■ 544 general purpose input/output
■ 1.1-V core voltage
■ MAX ® V 5M2210ZF256C4N CPLD in a 256-pin FBGA package
■ MAX II EPM570F100C5N CPLD in a 100-pin FBGA package
■ FPGA configuration circuitry
■ MAX V CPLD 5M2210ZF256C4N System Controller and flash fast passive
parallel (FPP) configuration
■ On-board USB-Blaster TM II for use with the Quartus ® II Programmer
■ Clocking circuitry
■ Programmable clock generator for FPGA reference clock input
■ 125-MHz LVDS oscillator for FPGA reference clock input
■ 148.5/148.35-MHz LVDS VCXO for FPGA reference clock input
■ 50-MHz single-ended oscillator for FPGA and CPLD clock input
■ 100-MHz single-ended oscillator for CPLD configuration clock input
■ SMA input (LVPECL)
■ Memory
■ Two 128-Mbyte (MB) DDR3 SDRAM with a total of 32-bit data bus
■ 2-MB SSRAM
■ Two 128-MB synchronous flash