Direct memory addressing, Table 13, Bit addressing (object code only) – Zilog Z16F2810 User Manual

Page 45

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UM018809-0611

Operand Addressing

ZNEO

®

CPU Core

User Manual

29

Direct Memory Addressing

A Direct Memory operand specifies a memory address to be used by the instruction.

Example.

The following assembly language statement loads ALU register R7 with the

value in memory address

0000_B002H

:

LD.SB R7, B002H

Any data operand which does not contain an immediate value (#n) or register name (Rn) is
assumed to be a memory address. Depending on the instruction, a direct memory address
can be used in either the source or destination operand, but a destination’s effective
address must be a writable memory or I/O location.

ZNEO CPU uses 32-bit memory addresses, but it includes instruction opcodes which
accept 16-bit addresses. A 16-bit address operand in object code is sign-extended by the
CPU (see the

Resizing Data

section on page 31) to create the effective address used. This

feature splits the 16-bit address range between the highest and lowest 32K blocks of the 16
GB address space. Table 13 provides the 16-bit address ranges for object code.

Effective addresses are expressed as 32-bit values. Current devices ignore address bits
[31:24], providing a 24-bit address space.

Internal RAM and I/O memory falls in the range

FFFF_8000H

to

FFFF_FFFFH

(

FF_8000H

to

FF_FFFFH

on devices that ignore address bits [31:24]), so 16-bit address-

ing provides efficient access to internal RAM and I/O memory.

The ZNEO CPU assembler does not automatically use 16-bit addressing if an unmodified
16-bit address is specified, as in the previous example. In this case the assembler selects
16-bit or 32-bit addressing to ensure the address is used as specified.

However, you can append address range mnemonics to specify whether the assembler
should use 16-bit or 32-bit addressing. The RAM, IODATA, and ROM mnemonics tell the
assembler to use 16-bit addressing, as shown in the following example statements:

LD.SB R7, B002H:RAM ; Effective address is FFFF_B002H

LD.SB R7, E002H:IODATA ; Effective address is FFFF_E002H

LD.SB R7, 3002H:ROM ; Effective address is 0000_3002H

Table 13. 16-Bit Addressing (Object Code Only)

16-Bit Address Range

32-Bit Effective Addresses

Memory Space

0000H to 7FFFH

0000_000H to 0000_7FFFH

ROM

8000H to FFFFH

FFFF_8000H to FFFF_FFFFH

RAM and I/O

Note:

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