Zilog Z8F0130 User Manual
Cpu core
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This manual is related to the following products:
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Table of contents
Document Outline
- eZ8™ CPU Core
- Revision History
- Table of Contents
- Manual Objectives
- Architectural Overview
- Z8® Compatibility
- Address Space
- Interrupts
- Addressing Modes
- Illegal Instruction Traps
- eZ8™ CPU Instruction Set Summary
- eZ8™ CPU Instruction Set Description
- ADC
- ADCX
- ADD
- ADDX
- AND
- ANDX
- ATM
- BCLR
- BIT
- BRK
- BSET
- BSWAP
- BTJ
- BTJNZ
- BTJZ
- CALL
- CCF
- CLR
- COM
- CP
- CPC
- CPCX
- CPX
- DA
- DEC
- DECW
- DI
- DJNZ
- EI
- HALT
- INC
- INCW
- IRET
- JP
- JP cc
- JR
- JR cc
- LD
- LDC
- LDCI
- LDE
- LDEI
- LDWX
- LDX
- LEA
- MULT
- NOP
- OR
- ORX
- POP
- POPX
- PUSH
- PUSHX
- RCF
- RET
- RL
- RLC
- RR
- RRC
- SBC
- SBCX
- SCF
- SRA
- SRL
- SRP
- STOP
- SUB
- SUBX
- SWAP
- TCM
- TCMX
- TM
- TMX
- TRAP
- WDT
- XOR
- XORX
- Op Code Maps
- Op Codes Listed Numerically
- Assembly and Object Code Example
- Index
- Customer Support