Zilog Z8F0130 User Manual

Page 263

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eZ8

CPU Core

User Manual

UM012820-0810

TMX Instruction

248

Attributes

Escaped Mode Addressing

Using Escaped Mode Addressing, address mode ER for the source or des-
tination can specify a working register with 4-bit addressing.

If the high byte of the source or destination address is

EEh

(

11101110b

),

a working register is inferred. For example, the operand

EE3h

selects

Working Register R3. The full 12-bit address is provided by

{RP[3:0],

RP[7:4], 3h}

.

To access registers on Page

Eh

(addresses

E00h

to

EFFh

), set the Page

Pointer, RP[3:0], to

Eh

and set the Working Group Pointer,

RP[7:4]

, to

the preferred Working Group.

Sample Usage

If Register 789h contains the value

45h

(

01000101b

) and Register 246h

contains the value

02h

(

00000010b

) (testing bit 1 if it is 0), the following

statement sets the Z flag (indicating bit 1 in the destination operand is 0)
and clears the V and S flags:

TMX 789h, 246h

Object Code: 78 24 67 89

If Register 13h contains the value

F1h

(

11110001b

), the following state-

ment tests bit 1 of the destination operand for 0 sets the Z flag (indicating
bit 1 in the destination operand is 0) and clears the S and V flags:

TMX %013, #02h

Object Code: 79 02 00 13

Mnemonic

Destination,
Source

Op Code
(Hex)

Operand 1

Operand 2

Operand 3

TMX

ER1, ER2

78

ER2[11:4]

{ER2[3:0],
ER1[11:8]}

ER1[7:0]

TMX

ER1, IM

79

IM

{0h,
ER1[11:8]}

ER1[7:0]

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