Document Outline

• MVME7100 Single Board Computer
• Contents
• About this Manual
  • Overview of Contents
  • Abbreviations
  • Conventions
  • Summary of Changes
• Introduction
  • 1.1 Features
  • 1.2 Standard Compliances
  • 1.3 Mechanical Data
  • 1.4 Ordering Information
    • 1.4.1 Supported Board Models
    • 1.4.2 Board Accessories
• Hardware Preparation and Installation
  • 2.1 Overview
  • 2.2 Unpacking and Inspecting the Board
  • 2.3 Requirements
    • 2.3.1 Environmental Requirements
    • 2.3.2 Power Requirements
    • 2.3.3 Thermal Requirements
    • 2.3.4 Thermally Significant Components
    • 2.3.5 Equipment Requirements
  • 2.4 Configuring the Board
    • 2.4.1 SMT Configuration Switch, S1
      • 2.4.1.1 Safe Start Switch
      • 2.4.1.2 Boot Block B Select
      • 2.4.1.3 Flash Bank Write Protect
      • 2.4.1.4 JTAG Pass-Thru
      • 2.4.1.5 Low Memory Offset
      • 2.4.1.6 PMC 133 MHz
      • 2.4.1.7 Master WP
    • 2.4.2 Geographical Address Switch, S2
    • 2.4.3 VME System Controller Select, S2
  • 2.5 Installing Accessories
    • 2.5.1 Transition Module
    • 2.5.2 PMC
    • 2.5.3 XMCspan
  • 2.6 Installing and Removing the Board
  • 2.7 Completing the Installation
  • 2.8 Factory Installed Linux
• Controls, LEDs, and Connectors
  • 3.1 Overview
  • 3.2 Board Layout
  • 3.3 Front Panel
    • 3.3.1 Reset/Abort Switch
    • 3.3.2 LEDs
    • 3.3.3 Connectors
      • 3.3.3.1 XMC Expansion Connector (J6)
      • 3.3.3.2 Ethernet Connectors (J4A/J4B)
      • 3.3.3.3 PCI Mezzanine Card (PMC) Connectors (J11 – J14, J21 – J23)
      • 3.3.3.4 Serial Port Connector (COM1/J1)
      • 3.3.3.5 USB Connector (J2)
      • 3.3.3.6 VMEbus P1 Connector
      • 3.3.3.7 VMEbus P2 Connector
  • 3.4 Headers
    • 3.4.1 Processor COP Header (P4)
    • 3.4.2 Boundary Scan Header (P5)
• Functional Description
  • 4.1 Overview
  • 4.2 Block Diagram
  • 4.3 Processor
  • 4.4 I2C Serial Interface and Devices
  • 4.5 System Memory
  • 4.6 Timers
  • 4.7 Ethernet Interfaces
  • 4.8 Local Bus Interface
    • 4.8.1 Flash Memory
    • 4.8.2 NVRAM
    • 4.8.3 Quad UART (QUART)
    • 4.8.4 Control and Timers PLD
  • 4.9 DUART Interface
  • 4.10 PCI-E Port 0
    • 4.10.1 VME Controller
    • 4.10.2 USB
  • 4.11 XMC Expansion
  • 4.12 Power Supplies
    • 4.12.1 Power Sequencing
    • 4.12.2 Power Supply Monitor
    • 4.12.3 Power Supply Filtering and Fusing
  • 4.13 Clock Distribution
    • 4.13.1 System Clock
    • 4.13.2 Real Time Clock Input
    • 4.13.3 Local Bus Controller Clock Divisor
  • 4.14 Reset Control Logic
  • 4.15 Real Time Clock Battery
• Transition Module
  • 5.1 Overview
  • 5.2 Transition Module Layout
  • 5.3 Features
  • 5.4 SEEPROM Address Switch, S1
  • 5.5 Rear Panel Connectors
    • 5.5.1 MVME7216E PMC I/O Module (PIM) Connectors (J10, J14)
    • 5.5.2 Ethernet Connectors (GIGE/J2B, GIGE/J2A)
    • 5.5.3 Serial Port Connectors (COM2–COM5/J1A-D)
  • 5.6 PMC Input/Output Module
• MOTLoad Firmware
  • 6.1 Overview
  • 6.2 Implementation and Memory Requirements
  • 6.3 MOTLoad Commands
    • 6.3.1 Utilities
    • 6.3.2 Tests
    • 6.3.3 Command List
  • 6.4 Using the Command Line Interface
    • 6.4.1 Rules
    • 6.4.2 Help
  • 6.5 Firmware Settings
    • 6.5.1 Default VME Settings
    • 6.5.2 Control Register/Control Status Register Settings
    • 6.5.3 Displaying VME Settings
    • 6.5.4 Editing VME Settings
    • 6.5.5 Deleting VME Settings
    • 6.5.6 Restoring Default VME Settings
  • 6.6 Remote Start
  • 6.7 Boot Images
    • 6.7.1 Checksum Algorithm
    • 6.7.2 Image Flags
    • 6.7.3 User Images
    • 6.7.4 Alternate Boot Data Structure
    • 6.7.5 Alternate Boot Images and Safe Start
    • 6.7.6 Boot Image Firmware Scan
  • 6.8 Startup Sequence
• A Battery Exchange
  • A.1 Battery Exchange
• B Related Documentation
  • B.1 Artesyn Embedded Technologies - Embedded Computing Documentation
  • B.2 Manufacturers’ Documents
  • B.3 Related Specifications
• Safety Notes
• Sicherheitshinweise