Artesyn MVME6100 Single Board Computer Installation and Use (June 2014) User Manual
Mvme6100 single board computer
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Table of contents
Document Outline
- MVME6100 Single Board Computer
- Contents
- About this Manual
- Hardware Preparation and Installation
- Startup and Operation
- MOTLoad Firmware
- 3.1 Overview
- 3.2 Implementation and Memory Requirements
- 3.3 MOTLoad Commands
- 3.4 Using the Command Line Interface
- 3.5 Firmware Settings
- 3.6 Remote Start
- 3.7 Alternate Boot Images and Safe Start
- 3.8 Firmware Startup Sequence Following Reset
- 3.9 Firmware Scan for Boot Image
- 3.10 Boot Images
- 3.11 Startup Sequence
- Functional Description
- 4.1 Overview
- 4.2 Features
- 4.3 Block Diagram
- 4.4 Processor
- 4.5 L3 Cache
- 4.6 System Controller
- 4.6.1 CPU Bus Interface
- 4.6.2 Memory Controller Interface
- 4.6.3 Device Controller Interface
- 4.6.4 PCI/PCI-X Interfaces
- 4.6.5 Gigabit Ethernet MACs
- 4.6.6 SRAM
- 4.6.7 General-Purpose Timers/Counters
- 4.6.8 Watchdog Timer
- 4.6.9 I2O Message Unit
- 4.6.10 Four Channel Independent DMA Controller
- 4.6.11 I2C Serial Interface and Devices
- 4.6.12 Interrupt Controller
- 4.6.13 PCI Bus Arbitration
- 4.7 VMEbus Interface
- 4.8 PMCspan Interface
- 4.9 Flash Memory
- 4.10 System Memory
- 4.11 Asynchronous Serial Ports
- 4.12 PCI Mezzanine Card Slots
- 4.13 Real-Time Clock/NVRAM/Watchdog Timer
- 4.14 IDSEL Routing
- 4.15 Reset Control Logic
- 4.16 Debug Support
- 4.17 Processor JTAG/COP Headers
- Pin Assignments
- A Specifications
- B Thermal Validation
- C Related Documentation