BECKHOFF DK9222-0213-0063 User Manual

Page 9

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XFC

Oversampling

Application Note DK9222-0213-0063

Limitations

The complete program causes quite a heavy load on a CPU as a lot of data is copied and calculations are executed. Running
the program on a CX5010 at a PLC cycle time of T#1ms occupies 50% of the CPU capacity. When expanding the cycle time
to T#2ms at an oversampling rate of 100, the CPU load will still be 25%. Under these conditions it is however possible to
manage 20…25 samples per timecode bit which is quite acceptable.

Please note: When the PLC cycle time is changed, other constants in the program have to be adjusted, too:
10 stands for a 10 µs oversampling rate (cycle time/oversampling rate: 1 ms/1000 = 10 µs). If the cycle time is

expanded to 2 ms, the oversampling rate should be set to 20.

– If the oversampling rate in the source code is changed, the factor has to be adapted in the System Manager, too.

Fig. 6 Further constants needs to be adjusted if the cycle time is changed.

With a PLC at T#1ms and an oversampling rate of 50, the CPU load is still 40%. A further decrease is not possible as then
the number of sample would not be sufficient to generate the signal correctly. Therefore the use of a CX5020 or a higher
performance device is recommended.

Cycle time

Oversampling rate

1 ms

1 ms

2 ms

50

100

100

CPU load

40 %

50 %

25 %

Table 4 Performance limitations with a CX5010

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9

For application notes see disclaimer on the last page

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