Fluke Biomedical 960CI-200 - Manual (Page 13)

Theory of Operation
4
4-3
RX: Receive (Serial data)
When address 300 is decoded, ACIA1 goes low and enables U16. Data can then be READ from or WRITTEN to the
ACIA. For detailed operation of a 6850 ACIA refer to the Motorola manual.
U19 is a watchdog timer for the time-out circuit. IC U9 is a dual re-triggerable one-shot chip. It is trailing edge
triggered and has a fixed output of 100 ms. when timed out, Q1 will be high and LOOP 1 TX DATA will be high also.
This condition is necessary because LOOP 1 TX could be low at that time due to a condition on ACIA 1, which could
cause it to latch low. During the next transmission, transistor Q1 will be low and LOOP 1 TX will pass through OR gate
U20.
Serial data is communicated between two monitors or between a monitor and a minicomputer through connector
J2. Refer to figure 4-1 for the loop diagram.
Zener diode D6 and resistor R24 regulate the voltage to the 5 VDC required to operate the optical isolator’s transistor,
(part of U22). The +VL1 and –VL1 voltage for the communication loop is a floating 30 VDC. +VL2 voltage equals + 15
VDC and –VL2 equals –15 VDC. When the signal LOOP 1 TX DATA is low (logic 0), transistor Q3 turns on. As Q3
conducts, it supplies +5 VDC to pin 1 of U22 turning on the LED. This will cause the transistor in U22 to turn on.
U22’s output at pin 5 will go low (toward –VL, -15 VDC), causing transistor Q5 to turn off. When Q5 is turned off, its
output at the collector goes high. This will turn on both Q7 and Q11. Q11 conducts and TX-1 line will be pulled to –
VL1. Transistor Q7 also conducts, causing Q9 to turn on. This pulls TX+1 to +VL1.
When the LOOP 1 TX DATA signal is high, the process is reverted. The voltages at TX+1 and TX-1 will in effect change
polarity. The TX-1 goes to VL+1 and TX+1 goes to VL-1 through resistors R42 and R44.
The RX section of the loop receives a signal from a transmit loop. When RX+ is at –VL and RX- is at +VL, U24 will be
on to transmit logic 0 to ACIA 1 through LOOP 1 RX DATA. When RX+ is at +VL and RX- is at –VL, U24 will be off and
ACIA 1 will receive logic 1 (R48 is a pull-up resistor to +5 VDC).
4.7 Clock Circuitry
XTAL 1 is a 4 MHz crystal from which the basic clock frequency is derived. Pin 34 of U1 is used for TTL 02. U9 and U8
generate SHORT 02, which is used for early write in a write cycle.
4.8 Baud Rate Generator
U12 is a CMOS programmable bit rate generator. Base crystal frequency is 2.4576 MHz, connected between pins 6
and 7. Output is at pin 10. Bit rate programming is done by switch setting on SW2 (refer to table 4-2 for baud rate
selection). Pin 15 and pin 3 are shorted and give a base frequency of 302700 Hz to generate NMI and FNMI signals.