Dell PowerEdge T610 - Manual (Page 32)

Dell
PowerEdge T610 Technical Guide 32
If memory modules with different speeds are installed, they will operate at the speed of the slowest
installed memory module(s).
For quad-rank DIMMs mixed with single- or dual-rank DIMMs, the quad-rank DIMM must be installed in
the slot with the white ejection tabs (the first DIMM slot in each channel). There is no requirement
for the order of single- and dual-rank DIMMs.
7.4 DIMM Slots
The PowerEdge T610 has 12 DIMM slots for memory. It does not have any riser cards for DIMM
population.
The first DIMM slot in each channel is color-coded with white ejection tabs for ease of installation.
The DIMM sockets are placed 450 mils (11.43 mm) apart, center-to-center to provide enough space
for sufficient airflow to cool stacked DIMMs.
7.5 Low Voltage DIMMs
With the introduction of the Intel ® Xeon ® processor 5600 series, low voltage (LV) DIMMs have been
added for selected memory configurations for the PowerEdge T610. Only this processor series
supports operating DIMMs at the lower voltage (1.35V, also referred to as DDR3L). The Intel Xeon
5500 processor series does not support low voltage operation. However, they can be operated at
1.5V. Therefore, DDR3L DIMMs can be used in systems with either processor series, and the platform
will automatically choose the appropriate operating voltage based on the processor populated.
DDR3L DIMMs will be qualified and available for use with Intel Xeon 5500 processor series mid-year
2011. Contact your Dell Sales Representative or visit Dell.com for more information.
LV DIMMs operate at 1.35V, creating power savings vs. standard memory which operates at 1.5V. In
order to achieve power savings, all DIMMs in the system must be of the LV type. If the system detects
a mixture of standard and LV DIMMs, the BIOS will operate all memory at 1.5V. When operating at
the lower voltage, additional frequency and population restrictions can take effect. For example, 3
DIMMs per channel operation is not supported at low voltage.
The DDR3L standard is completely backward compatible at standard voltage. DDR3L DIMMs can
operate at 1.5V without any limitations beyond standard voltage DDR3 DIMMs. As part of the addition
of LV DIMMs, the platform has certain default behaviors. Whenever possible, if there is no
performance degradation, the platform will default to 1.35V operation when using DDR3L DIMMs. In
certain cases, where a configuration is populated that cannot support 1.35V or a performance
degradation would result, the platform defaults to 1.5V operation. There are also options to override
default voltage within allowed limits.
7.6 Mirroring
The T610 system supports memory mirroring if identical memory modules are installed in the two
channels closest to the processor (memory not installed in the farthest channel). Mirroring must be
enabled in the System Setup program. In a mirrored configuration, the total available system
memory is one-half of the total installed physical memory.
7.7 Sparing
Systems with the Intel Xeon processor 5600 series support memory sparing. Sparing requires identical
memory installed in all three channels. One of the three channels is considered the Spare Channel,
and two-thirds of the total installed memory is usable and is the amount reported during POST and in
BIOS setup.
7.8 Memory Scrubbing
The T610 memory interface supports memory demand and patrol scrubbing, single-bit correction and
multi-bit error detection. Correction of a x4 or x8 device failure is also possible with (SDDC) in the