IBASE SI-62 - Manual (Page 44)

42 SI-62 User Manual
Chipset Settings
This section allows you to configure and improve your system and allows you to set
up some system features according to your preference.
Aptio Setup Utility
Main Advanced Chipset Boot Security Save & Exit
► PCH-IO Configuration
► System Agent (SA) Configuration
PCH-IO Configuration
This section allows you to configure the North Bridge Chipset.
Aptio Setup Utility
Main Advanced Chipset Boot Security Save & Exit
Intel PCH RC Version 1.1.0.0
→ ← Select Screen
↑↓ Select Item
Enter: Select
+- Change Field
F1: General Help
F2: Previous Values
F3: Optimized Default
F4: Save ESC: Exit
Intel PCH SKU Name QM77
Intel PCH Rev ID O4/C1
► PCI Express Configuration
► USB Configuration
► PCH Azalia Configuration
PCH LAN Controller Enabled
Wake on LAN Disabled
Board Capability SUS_PWR_ON_ACK
High Precision Event Timer Configuration
High Precision Timer Enabled
SLP_S4 Assertion Width 1-2 Seconds
PCH LAN Controller
Enable or disable onboard NIC.
Wake on LAN
Enable or disable integrated LAN to wake the system. (The Wake On LAN cannot be
disabled if ME is on at Sx state.)
SLP_S4 Assertion Width
Select a minimum assertion width of the SLP_S4# signal.