IBASE IPPC1501-RE - Manual (Page 42)

34 IPPC1501-RE User Manual
Intel IGD Configuration
Aptio Setup Utility
Main Advanced Chipset Boot Security Save & Exit
Intel IGD Configuration
→ ←Select Screen
↑↓ Select Item
Enter: Select
+- Change Opt
F1: General Help
F2: Previous Values
F3: Optimized Default
F4: Save & EXIT
ESC: Exit
IGFX-Boot Type
LVDS Back Light Control
VBIOS Default
7(MAX)
IGFX-Boot Type
Select the video Device which will be activated during POST.
South Bridge
This section allows you to configure the South Bridge Chipset.
Aptio Setup Utility
Main Advanced Chipset Boot Security Save & Exit
→ ←Select Screen
↑↓ Select Item
Enter: Select
+- Change Opt
F1: General Help
F2: Previous Values
F3: Optimized Default
F4: Save & EXIT
ESC: Exit
► TPT Device
► PCI Express Root Port0
► PCI Express Root Port1
► PCI Express Root Port2
► PCI Express Root Port3
DMI Link ASPM Control Enabled
PCI-Exp. High Priority Port Disabled
High Precision Event Timer Configuration
High Precision Timer Enabled
SLP_SP4 Assertion Width 1-2 Seconds
DMI Clink ASPM Control
The control of Active State Power Management on both NB and SB side of the DMI Link.
PCI-Exp. High Priority Port
The options are Disabled, Port1, Port2, Port3, and Port4.
High Precision Event Timer Configuration
Enable/or Disable the High Precision Event Timer.
SLP_S4 Assertion Stretch Enable
Select a minimum assertion width of the SLP_S4# signal.