Pci express configuration, Pci express clock gating, Dmi link aspm control – IBASE IPPCXXA9-RE User Manual

Page 48: Pcie-usb glitch w/a

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IPPCxxA9-RE User Manual

PCI Express Configuration

Aptio Setup Utility

Main Advanced Chipset

Boot

Security Save & Exit

PCI Express Configuration








→ ← Select Screen

↑↓

Select Item

Enter: Select
+-

Change Field

F1:

General Help

F2:

Previous Values

F3: Optimized Default

F4: Save ESC: Exit

PCI Express Clock Gating

Enabled

DMI Link ASPM Control

Enabled

DMI Link Extended Synch Control

Disabled

PCIe-USB Glitch W/A

Disabled

Subtractive Decode

Disabled

► PCI Express Root Port 1

► PCI Express Root Port 2

► PCI Express Root Port 3

► PCI Express Root Port 4

► PCI Express Root Port 5

PCI-E Port 6 is assigned to LAN

► PCI Express Root Port 7

► PCI Express Root Port 8


PCI Express Clock Gating

Enable or disable PCI Express Clock Gating for each root port.

DMI Link ASPM Control

The control of Active State Power Management on both NB side and SB side of the

DMI link.

PCIe-USB Glitch W/A

PCIe-USB Glitch W/A for bad USB device(s) connected behind PCIE/PEG port.







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