Virtex fpga configuration, Virtex fpga design – Sundance SMT498 User Manual
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Virtex FPGA configuration
Programming of the Virtex FPGA can be achieved over the PCI bus using the
SelectMAP interface. This interface is 8-bits wide and runs at the full speed of the
Local bus. By simply writing a stream of configuration bytes to the location at CS[0]
the FPGA can be programmed.
An example of this is provided in the SMT6041-498 software package available from
SUNDANCE.
Virtex FPGA design
Once the FPGA has been programmed the user may then communicate with the
design by means of CS regions 1, 2 and 3. 12 address lines allow for a total
addressable space of 4kB per CS region. Accesses to these regions may be up to
64-bits wide.
An example of this is provided in the SMT6041-498 software package available from
SUNDANCE
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