Sundance SMT365 - Manual (Page 17)

Version 2.3 Page 17 of 28 SMT365 User Manual
Timer
The TIM TCLK0 and TCLK1 signals can be routed to the DSP’s TOUT/TINP pins.
The signal direction must be specified, together with the routing information in the
timer control register:
31–6 5 4 3–0
Reserved TCLK1 TCLK0 Reserved
Field Description
0 TIM TCLK0 is an input
TCLK0
1 Enable TIM TCLK0 as an output
0 TIM TCLK1 is an input
TCLK1
1 Enable TIM TCLK1 as an output
If the TIM TCLKx pin is selected as an output, the DSP TOUTx signal will be used to
drive it. The TIM TCLKx pin will always drive the DSP TINPx input.
The Timer control register is described in the SMT6400 help file .
C6x
FPGA
TCLK0EN
TOUT0 TCLK0
TINP0