Epson S1C33210 User Manual

Page 38

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4 PERIPHERAL CIRCUITS

A-24

EPSON

S1C33210 PRODUCT PART

Name

Address

Register name

Bit

Function

Setting

Init.

R/W

Remarks

0x0 to 0xFF(0x7F)

TXD17

TXD16

TXD15

TXD14

TXD13

TXD12

TXD11

TXD10

D7

D6

D5

D4

D3

D2

D1

D0

Serial I/F Ch.1 transmit data

TXD17(16) = MSB

TXD10 = LSB

X

X

X

X

X

X

X

X

R/W 7-bit asynchronous

mode does not use

TXD17.

00401E5

(B)

Serial I/F Ch.1

transmit data

register

0x0 to 0xFF(0x7F)

RXD17

RXD16

RXD15

RXD14

RXD13

RXD12

RXD11

RXD10

D7

D6

D5

D4

D3

D2

D1

D0

Serial I/F Ch.1 receive data

RXD17(16) = MSB

RXD10 = LSB

X

X

X

X

X

X

X

X

R

7-bit asynchronous

mode does not use

RXD17 (fixed at 0).

00401E6

(B)

Serial I/F Ch.1

receive data

register

TEND1

FER1

PER1

OER1

TDBE1

RDBF1

D7–6

D5

D4

D3

D2

D1

D0

Ch.1 transmit-completion flag

Ch.1 flaming error flag

Ch.1 parity error flag

Ch.1 overrun error flag

Ch.1 transmit data buffer empty

Ch.1 receive data buffer full

0

0

0

0

1

0

R

R/W

R/W

R/W

R

R

0 when being read.

Reset by writing 0.

Reset by writing 0.

Reset by writing 0.

00401E7

(B)

1 Error

0 Normal

1 Transmitting 0 End

1 Error

0 Normal

1 Error

0 Normal

1 Empty

0 Buffer full

1 Buffer full

0 Empty

Serial I/F Ch.1

status register

TXEN1

RXEN1

EPR1

PMD1

STPB1

SSCK1

SMD11

SMD10

D7

D6

D5

D4

D3

D2

D1

D0

Ch.1 transmit enable

Ch.1 receive enable

Ch.1 parity enable

Ch.1 parity mode selection

Ch.1 stop bit selection

Ch.1 input clock selection

Ch.1 transfer mode selection

1

1

1

0

SMD1[1:0]

Transfer mode

8-bit asynchronous

7-bit asynchronous

0

0

X

X

X

X

X

X

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Always set to 0

Always set SMD11 to

1

00401E8

(B)

Serial I/F Ch.1

control register

1 Enabled

0 Disabled

1 Enabled

0 Disabled

1 With parity

0 No parity

1 Odd

0 Even

1 2 bits

0 1 bit

1 –

0 Internal clock

DIVMD1

IRTL1

IRRL1

IRMD11

IRMD10

D7–5

D4

D3

D2

D1

D0

Ch.1 async. clock division ratio

Ch.1 IrDA I/F output logic inversion

Ch.1 IrDA I/F input logic inversion

Ch.1 interface mode selection

1

1

0

0

1

0

1

0

IRMD1[1:0]

I/F mode

reserved

IrDA 1.0

reserved

General I/F

X

X

X

X

X

R/W

R/W

R/W

R/W

0 when being read.

00401E9

(B)

1 1/8

0 1/16

1 Inverted

0 Direct

1 Inverted

0 Direct

Serial I/F Ch.1

IrDA register

0x0 to 0xFF(0x7F)

TXD27

TXD26

TXD25

TXD24

TXD23

TXD22

TXD21

TXD20

D7

D6

D5

D4

D3

D2

D1

D0

Serial I/F Ch.2 transmit data

TXD27(26) = MSB

TXD20 = LSB

X

X

X

X

X

X

X

X

R/W

00401F0

(B)

Serial I/F Ch.2

transmit data

register

0x0 to 0xFF(0x7F)

RXD27

RXD26

RXD25

RXD24

RXD23

RXD22

RXD21

RXD20

D7

D6

D5

D4

D3

D2

D1

D0

Serial I/F Ch.2 receive data

RXD27(26) = MSB

RXD20 = LSB

X

X

X

X

X

X

X

X

R

00401F1

(B)

Serial I/F Ch.2

receive data

register

TEND2

FER2

PER2

OER2

TDBE2

RDBF2

D7–6

D5

D4

D3

D2

D1

D0

reserved

Ch.2 transmit-completion flag

Ch.2 flaming error flag

Ch.2 parity error flag

Ch.2 overrun error flag

Ch.2 transmit data buffer empty

Ch.2 receive data buffer full

0

0

0

0

1

0

R

R/W

R/W

R/W

R

R

0 when being read.

Reset by writing 0.

Reset by writing 0.

Reset by writing 0.

00401F2

(B)

1 Error

0 Normal

1 Transmitting 0 End

1 Error

0 Normal

1 Error

0 Normal

1 Empty

0 Buffer full

1 Buffer full

0 Empty

Serial I/F Ch.2

status register

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