Avago Technologies LSI53C140 - Manual (Page 49)

Electrical Characteristics 3-15
Ver. 2.1 Copyright © 1998–2001 by LSI Logic Corporation. All rights reserved.
Figure 3.6 External Reset Circuit
Table 3.12 Bidirectional SCSI Signals — A_SCD
±
, A_SIO
±
,
A_SMSG
±
, A_SBSY
±
, A_SATN
±
, A_SSEL
±
, A_SRST
±
,
B_SCD
±,
B_SIO
±,
B_SMSG ,B_SBSY
±
, B_SATN ,
B_SSEL
±
, B_SRST
Symbol Parameter Min Max Unit Test Conditions
V
IH
Input high voltage 2.0 V
DD
+0.3 V –
V
IL
Input low voltage V
SS
−
0.3 0.8 V –
V
OL
Output low
voltage V
SS
0.5 V 48 mA
I
OZ
3-state leakage
−
20 20
µ
A V
PIN
= 0 V, 3.47 V
Table 3.13 Input Control Signals — CLOCK, RESET/, WS_ENABLE
Symbol Parameter Min Max Unit Test Conditions
V
IH
Input high voltage 2.0 5.55
1
1. Operating Conditions.
V –
V
IL
Input low voltage V
SS
0.8 V –
I
OZ
Input leakage
−
10 10
µ
A V
PIN
= 0 V, 5.25 V
Input
3.3 V
0.1
µ
F
Reset
Pin 146
3.3 V