Avago Technologies LSI53C140 - Manual (Page 9)

ix
Ver. 2.1 Copyright © 1998–2001 by LSI Logic Corporation. All rights reserved.
Tables
1.1 Types of Operation 1-3
1.2 SCSI Bus Distance Requirements 1-5
1.3 Transmission Mode Distance Requirements 1-6
2.1 DIFFSENS Voltage Levels 2-5
2.2 Direction Control Signal Polarity 2-12
2.3 HVD_MODE Control Signal Polarities 2-12
2.4 Mode Sense Control Voltage Levels 2-13
2.5 RESET/ Control Signal Polarity 2-13
2.6 WS_ENABLE/ Signal Polarity 2-14
2.7 XFER_ACTIVE Signal Polarity 2-14
3.1 SCSI A Side Interface Pins 3-7
3.2 SCSI B Side Interface Pins 3-8
3.3 Chip Interface Control Pins 3-9
3.4 Power and Ground Pins 3-10
3.5 Absolute Maximum Stress Ratings 3-11
3.6 Operating Conditions 3-12
3.7 LVD Driver SCSI Signals—A_SD[15:0]
±
, A_SDP[1:0]
±
,
A_SCD
,
A_SIO
±,
A_SMSG
±
, A_SREQ
±
, A_SACK
±
,
A_SBSY
±
, A_SATN
±
, A_SSEL
±
, A_SRST
±
, B_SD[15:0]
±
,
B_SDP[1:0]
±
, B_SCD
,
B_SIO
±,
B_SMSG
±
, B_SREQ
±
,
B_SACK
±
, B_SBSY
±
, B_SATN
±
, B_SSEL
±
, B_SRST
±
3-12
3.8 LVD Receiver SCSI Signals—A_SD[15:0]
±
, A_SDP[1:0]
±
,
A_SCD
±
, A_SIO
±
, A_SMSG
±
, A_SREQ
±
, A_SACK
±
,
A_SBSY
±
, A_SATN
±
, A_SSEL
±
, A_SRST
±,
B_SD[15:0]
±
,
B_SDP[1:0]
±
, B_SCD
±
, B_SIO
±
, B_SMSG
±
, B_SREQ
±
,
B_SACK
±
, B_SBSY
±
, B_SATN
±
, B_SSEL
±
, B_SRST
±
3-13
3.9 DIFFSENS SCSI Signal 3-14
3.10 Input Capacitance 3-14
3.11 Bidirectional SCSI Signals—A_SD[15:0]
±
, A_SDP[1:0]
±
,
A_SREQ
±
, A_SACK
±
, B_SD[15:0]
±
, B_SDP[1:0]
±
,
B_SREQ
±
, B_SACK
± 3−14
3.12 Bidirectional SCSI Signals—A_SCD, A_SIO
±
, A_SMSG
±
,
A_SBSY
±
, A_SATN
±
, A_SSEL
±
, A_SRST
±
, B_SCD
±,
B_SIO
±,
B_SMSG, B_SBSY
±
, B_SATN, B_SSEL
±
,
B_SRST 3-15
3.13 Input Control Signals—CLOCK, RESET/, WS_ENABLE 3-15
3.14 Output Control Signals—BSY_LED, XFER_ACTIVE 3-16