Avago Technologies LSI53C320 - Manual (Page 36)

3-2 Signal Description
Version 2.2 Copyright © 2003 by LSI Logic Corporation. All rights reserved.
Figure 3.1 LSI53C320 Functional Signal Grouping
A_SSEL+
A_SSEL-
A_SBSY+
A_SBSY-
A_SRST+
A_SRST-
A_SREQ+
A_SREQ-
A_SACK+
A_SACK-
A_SMSG+
A_SMSG-
A_SCD+
A_SCD-
A_SIO+
A_SIO-
A_SATN+
A_SATN-
A_SDP[1:0]+
A_SDP[1:0]-
A_SD[15:0]+
A_SD[15:0]-
A_DIFFSENS
B_SSEL+
B_SSEL-
B_SBSY+
B_SBSY-
B_SRST+
B_SRST-
B_SREQ+
B_SREQ-
B_SACK+
B_SACK-
B_SMSG+
B_SMSG-
B_SCD+
B_SCD-
B_SIO+
B_SIO-
B_SATN+
B_SATN-
B_SDP[1:0]+
B_SDP[1:0]-
B_SD[15:0]+
B_SD[15:0]-
B_DIFFSENS
LVD or SE
SCSI Interface
B Side
Control
LSI53C320
CHIP_RESET/
WS_ENABLE/
BSY_LED
XFER_ACTIVE
CLOCK
A_RBIAS B_RBIAS
Signals
EEPROM
Signals
A Side
LVD or SE
SCSI Interface
S_SLC
S_DATA
Serial