Avago Technologies LSI53C320 - Manual (Page 7)

Contents vii
Version 2.2 Copyright © 2003 by LSI Logic Corporation. All rights reserved.
Figures
1.1 LSI53C320 SCSI Bus Modes 1-2
1.2 LSI53C320 Server Clustering 1-3
1.3 LSI53C320 SCSI Bus Device 1-4
2.1 LSI53C320 Block Diagram 2-2
2.2 Paced Transfer Example 2-5
2.3 Example of Precompensation 2-6
2.4 Electrical Cable Lengths at Ultra320 SCSI Speeds 2-10
2.5 Serial EEPROM Connection 2-16
3.1 LSI53C320 Functional Signal Grouping 3-2
4.1 LVD Driver 4-3
4.2 LVD Receiver 4-3
4.3 Rise and Fall Time Test Conditions 4-7
4.4 Clock Timing 4-8
4.5 272-Ball-Count PBGA (VG) Mechanical Drawing 4-9
4.6 LSI53C320 272-Ball BGA Top View 4-12
A.1 LSI53C320 Wiring Diagram 1 of 4 A-2
A.2 LSI53C320 Wiring Diagram 2 of 4 A-3
A.3 LSI53C320 Wiring Diagram 3 of 4 A-4
A.4 LSI53C320 Wiring Diagram 4 of 4 A-5