Document Outline

• Nios II C2H Compiler
  • Contents
  • 1. Introduction to the C2H Compiler
    • User Guide Overview
    • Target Audience
    • Introduction
      • Features
      • Design Abstraction and the Rise of C for FPGAs
      • What to Expect From the C2H Compiler
      • C2H Support in Nios II Tool Flows
    • C2H Compiler Concepts
      • Simplicity and Ease of Use
      • Rapid Design Iteration to Find Optimal Partitioning of Hardware and Software
      • Accelerate Performance-Critical Sections of Code
      • The C2H Compiler Operates at the Function Level
      • System Architecture
      • Generation of a Hardware Accelerator
      • One-to-One Mapping From C Syntax to Hardware Structure
      • Performance Depends on Memory Access Time
    • C Code Appropriate for Hardware Acceleration
      • Ideal Acceleration Candidates
      • Poor Acceleration Candidates
      • Understanding Code to Find Opportunities for Acceleration
    • Next Steps
  • 2. Getting Started Tutorial
    • Introduction
    • C2H Compiler Design Flow
      • Starting Point for the C2H Compiler Design Flow
    • Typical Design Flow
      • Software Requirements
      • OpenCore Plus Evaluation
    • Tutorial
      • Tutorial Design
      • Set up the Hardware for the Project
      • Create the Software Project
      • Run the Project as Software Only
      • Create and Configure a Hardware Accelerator
      • Rebuild the Project
      • Observe Results in the Report File
      • Observe the Accelerator in SOPC Builder
      • Run the Project with the Accelerator
      • Remove the Accelerator
    • Next Steps
  • 3. C-to-Hardware Mapping Reference
    • One-to-One C-to-Hardware Mapping
      • Arithmetic and Logical Operators
      • Assignments
        • Unregistered Operations and Assignments
        • Pipelined Operations and Assignments
      • Iteration Statements
      • Selection Statements
        • if Statement
        • Conditional Operator ?:
        • switch and case Statements
      • Subfunction Calls
      • Macros and Preprocessing Directives
    • Variable Declarations
      • Local vs. Non-Local Variables
      • Scalar Variables
        • Arrays, Structures, and Unions
        • Global and Static Variables
    • Memory Accesses
      • Indirection Operator (Pointer Dereference)
        • Creation of Avalon-MM master ports
        • Consolidation of Equivalent Pointers
        • Volatile Type Qualifier
      • Avalon-MM Master Port Signal Generation
        • Address Computation
        • Data Computation
        • Master-Slave Connections
          • Specifying Master-Slave Connections
          • Specifying Arbitration Shares
          • Specifying Flow Control
      • Array Subscript Operator
      • Structure and Union Operators
        • Member Operator .
        • Structure Pointer Operator ->
    • Scheduling
      • Scheduling Concepts for Hardware Accelerators
        • State Machines
        • Data Dependencies
      • Pointer Aliasing
        • __restrict__ Pointer Type Qualifier to Break Dependencies
        • Using Physically Separate Slave Ports to Break Dependencies
      • Read Operations with Latency
      • Stalling
        • Inner Loops
        • Subfunction Calls
        • Memory Transfers
      • Loop Pipelining
        • Pipelining Loop Iterations
        • Loop-Carried Dependencies
        • Pipelining Avalon-MM Read Transfers from Multiple Iterations
        • Loop Latency and Cycles per Loop Iteration (CPLI)
      • Subfunction Pipelining
    • Resource Sharing
  • 4. Understanding the C2H View
    • Introduction
    • Overview
      • Generation/Compilation Configurations
        • Project Build Configurations
        • Function Build Configurations
    • Resources
      • Avalon-MM Master Port Resources
      • Mathematical Operator Resources
    • Performance
      • Source Line Number
      • Loop Latency
      • Cycles Per Loop Iteration (CPLI)
      • Scheduling Information
        • Scheduling Information Per Assignment
        • Scheduling Information Per State
    • Further Reading
  • 5. Accelerating Code Using the Nios II Software Build Tools Command Line
    • Creating an Accelerator from the Command Line
    • C2H Performance Metrics
  • 6. Pragma Reference
    • Introduction
    • Connection Pragma
      • Reducing Arbitration Logic
      • Optimizing Sequential Memory Access with Arbitration Shares
    • Flow Control Pragma
    • Interrupt Pragma
    • Unshare Pointer Pragma
  • 7. ANSI C Compliance and Restrictions
    • Introduction
    • Language
      • Declarations
        • Unsupported Types (Section 6.7.2, Paragraph 1)
        • Bit-Field Declarations (Section 6.7.2.1)
        • Array Initialization (Section 6.7.8, Paragraph 3)
        • Delayed Declaration
      • Expressions
        • Unary Operator (Address Operator) (Section 6.5.3.2, Paragraph 1)
        • Logical Expressions
      • Functions
        • Function Arguments
          • Composite Types (Section 6.2.7)
          • Ellipsis (Section 6.7.5.3, Paragraph 9)
          • Struct and Union (Section 6.7.2.1, Paragraph 1)
          • Function Pointers (Section 6.7.5.3, Paragraph 8)
          • Function Argument Types (Section 6.9.1, Paragraph 13)
          • Function Prototypes (Section 6.9.1, Paragraph 14)
        • Recursive Function Calls (Section 6.5.2.2, Paragraph 11)
        • Function Specifiers (Section 6.7.4)
        • Functions Declared Without a Return Type
      • Miscellaneous Unsupported Features
        • Goto (Section 6.8.6.1)
        • Identifiers (Section 6.4.2.2)
        • Trigraph Sequences (Section 5.2.1.1)
        • Directives (Section 6.10)
          • Error Directive (Section 6.10.5)
          • Predefined Macro Names (Section 6.10.8)
    • Other Restrictions
  • Additional Information
    • Referenced Documents
    • Revision History
    • How to Contact Altera
    • Typographic Conventions