Intel Fireface 800 - Manual (Page 19)

User's Guide Fireface 800 © RME
19
Buffer Size
The setting Buffer Size determines the latency between incoming and outgoing ASIO and WDM
data, as well as affecting system stability (see chapter 13/14).
Bandwidth
Allows to reduce the amount of bandwidth used on the FireWire bus. See chapter 11.5.
All channels (default) activates all 28 input and output channels.
Analog + SPDIF + ADAT1 disables channels 21–28 (ADAT2).
Analog + SPDIF activates all 10 analog channels plus SPDIF.
Analog 1-8 activates only the first eight analog channels.
Errors does not refer to buffer errors, but FireWire transmission errors. The display will be reset
on any start of a playback/record. More information can be found in chapter 35.3.
Output Format
Word
The word clock output signal usually equals the current sample rate. Selecting Single Speed
causes the output signal to always stay within the range of 32 kHz to 48 kHz. So at 96 kHz and
192 kHz sample rate, the output word clock is 48 kHz.
ADAT2
This optical TOSLINK output can operate as ADAT or SPDIF output.
SPDIF
The SPDIF output can have the Channel Status Consumer or Professional and Emphasis indi-
cation. For further details please refer to chapter 27.2.
Input Source
SPDIF
Defines the input for the SPDIF signal. 'Coaxial' relates to the RCA socket, 'ADAT2' to the sec-
ond optical TOSLINK input.
Clock Mode
Sample Rate
Sets the currently used sample rate. Offers a central and comfortable way of configuring the
sample rate of all WDM devices to the same value, as since Vista this is no longer supported to
be done by the audio program. However, an ASIO program can still set the sample rate by it-
self.
At ongoing record/playback the selection is greyed out, so no change is possible.
Clock Source
The unit can be configured to use its own clock (Internal = Master), or one of the input signals
(Word, Optical, SPDIF coax., TCO). If the selected source isn't available, the unit will change to
the next available one (AutoSync). If none is available then the internal clock is used. The cur-
rent clock source is displayed to the right.
Pitch
More information on Pitch is available in chapter 11.2.
Input Status
Indicates for each input (Word, optical, SPDIF coax, TCO) whether there is a valid signal (Lock,
No Lock), or if there is a valid and synchronous signal (Sync). The second row shows the sam-
ple frequency measured by the hardware. In Clock Mode the clock reference is shown (Cur-
rent…). See also chapter 35.1.