SUPER MICRO Computer 6025B-UR User Manual

Page 77

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Chapter 7: BIOS

7-11

Enable Master

This setting allows you to enable the selected device as the PCI bus master.

The options are Enabled and Disabled.

Latency Timer

This setting allows you to set the clock rate for Bus Master. A high-priority, high-

throughout device may benefi t from a greater clock rate. The options are Default,

0020h, 0040h, 0060h, 0080h, 00A0h, 00C0h, and 00E0h. For Unix, Novell and

other Operating Systems, please select the option: other. If a drive fails after

the installation of a new software, you might want to change this setting and

try again. A different OS requires a different Bus Master clock rate.

Large Disk Access Mode

This setting determines how large hard drives are to be accessed. The options are

DOS or Other (for Unix, Novelle NetWare and other operating systems).

Advanced Chipset Control

Access the submenu to make changes to the following settings.

Warning

: Take caution when changing the Advanced settings. Incorrect

values entered may cause system malfunction. Also, a very high DRAM

frequency or incorrect DRAM timing may cause system instability. When

this occurs, revert to the default setting.

SERR Signal Condition

This setting specifi es the ECC Error conditions that an SERR# is to be asserted.

The options are None, Single Bit, Multiple Bit, and Both.

4GB PCI Hole Granularity

This feature allows you to select the granularity of PCI hole for PCI slots. If MTRRs

are not enough, this option may be used to reduce MTRR occupation. The options

are: 256 MB, 512 MB, 1GB and 2GB.

Memory Branch Mode

This option determines how the two memory branches operate. System address

space can either be interleaved between the two branches or Sequential from one

branch to another. Mirror mode allows data correction by maintaining two copies

of data in two branches. Single Channel 0 allows a single DIMM population during

system manufacturing. The options are Interleave, Sequential, Mirroring, and

Single Channel 0.

Branch 0 Rank Interleaving & Sparing

Select enable to enable the functions of Memory Interleaving and Memory Sparing

for Branch 0 Rank. The options for Memory Interleaving are 1:1, 2:1 and 4:1. The

options for Sparing are Enabled and Disabled.

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