Silicon Laboratories SI5375 - Manual (Page 102)

S i 5 3 x x - R M
102 Rev. 1.2
7.4. Crystal/Reference Clock Interfaces (Si5316, Si5319, Si5323, Si5324, Si5326, Si5327,
Si5328, Si5366, Si5368, Si5369, Si5374, Si5375, and Si5376)
All devices other than the Si5328, Si5374, Si5375, and Si5376 can use an external crystal or external clock as a
reference. The Si5374, Si5375, and Si5376 are limited to an external reference oscillator and cannot use a crystal.
In order to meet the SyncE timing card wander requirements, the Si5328 should use a low-jitter, low-wander
TCXO. If an external clock is used, it must be ac coupled. With appropriate buffers, the same external reference
clock can be applied to CKINn. Although the reference clock input can be driven single ended (See Figure 51),
best performance is with a crystal or differential LVPECL source. See Figure 55.
If the crystal is located close to a fan, it is recommended that the crystal be covered with some type of thermal cap.
For various crystal vendors and part numbers, see " Appendix A—Narrowband References" on page 108.
1. For SONET applications, the best jitter performance is with a 114.285 MHz third overtone crystal. The
Si5327 crystal is fundamental mode and is limited to values between 37 MHz and 41 MHz.
2. The jitter transfer for the external reference to CKOUT is nearly 1:1 (see " Appendix A—Narrowband
References" on page 108.)
3. In digital hold or VCO freeze mode, the VCO tracks any changes in the external reference clock.
Figure 51. CMOS External Reference Circuit
Figure 52. Sinewave External Clock Circuit
3.3 V
CMOS buffer,
8mA output current
3.3 V
130

150

150

XA
10 k 0.1
F
.6 V
0.1
F
XB
Si53xx
For 1.8 V operation, change 130
 to 47.5 .
For 2.5 V operation, change 130
 to 82 .
External Clock Source
50

0.01
F
1.2 V
0.6 V
10 pF
Si53xx
10 k

XA
0 dBm into 50

0.01
F
XB
0.1 µF