NXP Semiconductors P89LPC9321 UM10310 - Manual (Page 45)

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User manual Rev. 2 — 1 November 2010 45 of 139
NXP Semiconductors
UM10310
P89LPC9321 User manual
8.2 Changing RTCS1/RTCS0
RTCS1/RTCS0 cannot be changed if the RTC is currently enabled (RTCCON.0 = 1).
Setting RTCEN and updating RTCS1/RTCS0 may be done in a single write to RTCCON.
However, if RTCEN = 1, this bit must first be cleared before updating RTCS1/RTCS0.
8.3 Real-time clock interrupt/wake-up
If ERTC (RTCCON.1), EWDRT (IEN1.0.6) and EA (IEN0.7) are set to logic 1, RTCF can
be used as an interrupt source. This interrupt vector is shared with the watchdog timer. It
can also be a source to wake-up the device.
8.3.1 Real-time clock read back
Users can read RTCDATH and RTCDATL registers and get the 16-bit counter portion of
the RTC.
8.4 Reset sources affecting the Real-time clock
Only power-on reset and watchdog reset will reset the Real-time Clock and its associated
SFRs to their default state.
Table 30. Real-time Clock/System Timer clock sources
FOSC2:0 RCCLK RTCS1:0 RTC clock source CPU clock source
000 0 00 High frequency crystal High frequency crystal
/DIVM
01
10
11 High frequency crystal
/DIVM
1 00 High frequency crystal Internal RC oscillator
01
10
11 Internal RC oscillator
001 0 00 Medium frequency crystal Medium frequency crystal
/DIVM
01
10
11 Medium frequency crystal
/DIVM
1 00 Medium frequency crystal Internal RC oscillator
01
10
11 Internal RC oscillator