RAD Data comm ARC-101 User Manual

Page 13

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ARC-101 Installation & Operation Manual

Chapter 1. Introduction

ARC-101 Features

1-3

Traffic
Management

ATM cells are transferred from one interface to the other through an
internal bus, the bandwidth of which is 180 Mbps.

Cells that are received with a multiple-bit HEC error are dropped.

Cells received at the slower interface are transferred directly to the other
interface.

Cells received at the faster interface are transferred through the FIFO
which absorbs temporary bursts of ATM cells and transfers them
according to the other interface data rate.

The FIFO depth is 6K cells in SONET/SDH interfaces and 3K cells in other
interfaces.

The ARC-101 implements a single priority queue FIFO. Special circuitry is
responsible for the traffic management and for avoiding FIFO overflow.

The total bandwidth of CBR cells cannot exceed the slow interface
bandwidth.

The total bandwidth of VBR cells can only temporarily exceed the slow
interface data rate. If this bandwidth is exceeded, cells are queued in
FIFO and are transferred according to the slow interface data rate.

The ARC-101 has a configurable congestion threshold (limit) used to
handle UBR/ABR traffic. You can configure the threshold to be 25%, 50%,
75%, 90% or 100% of the total FIFO depth.

In order to control the UBR/ABR traffic bandwidth, you can configure the
ARC-101 for EFCI marking of cells that are received while the FIFO is
congested, or configure AAL5 Early Packet Discard mode in which a
whole frame is dropped in case of congestion, except for the last cell.

You can configure the ARC-101 to discard cells whose CLP bit is set,
when FIFO is congested.

The number of cells from a certain VP/VC is limited to 3/4 of the total
queue depth, in order to minimize the effects of large bursts of data from
one VC on the other VCs in the ARC-101.

The ARC-101 recalculates the HEC field of cells whose EFCI bit was
changed.

Loopback Mode

Each ARC-101 interface can be separately configured for Remote or
Internal Loopback mode. The Remote Loopback mode enables a loopback
of the incoming data and clock to the transmit data and clock outputs. The
Internal Loopback mode enables a loopback of the transmitted data to the
received data. Remote Loopback is not available in the E1 interface.

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