Renesas HD151TS207SS - Manual (Page 22)

HD151TS207SS
Rev.1.00, Apr.25.2003, page 22 of 38
I
2
C Controlled Register Bit Map (cont.)
Byte26 Control Register
Bit Description Contents Type Default Note
7 PCIF / PCI Clock Skew2
Control Bit3 R/W 0
6 PCIF / PCI Clock Skew2
Control Bit2 R/W 0
5 PCIF / PCI Clock Skew2
Control Bit1 R/W 0
4 PCIF / PCI Clock Skew2
Control Bit0
Skew2 is “Late” Skew that is Delay
Time from “Normal” Skew1.
0000 = +0.0ns, 1000 = +3.2ns
0001 = +0.4ns, 1001 = +3.6ns
0010 = +0.8ns, 1010 = +4.0ns
0011 = +1.2ns, 1011 = +4.4ns
0100 = +1.6ns, 1100 = +4.8ns
0101 = +2.0ns, 1101 = +5.2ns
0110 = +2.4ns, 1110 = +5.6ns
0111 = +2.8ns, 1111 = +6.0ns
R/W 0
See
Note
1
3 PCIF / PCI Clock Skew1
Control Bit3 R/W 1
2 PCIF / PCI Clock Skew1
Control Bit2 R/W 0
1 PCIF / PCI Clock Skew1
Control Bit1 R/W 0
0 PCIF / PCI Clock Skew1
Control Bit0
Skew1 is “Normal” Skew.
Delay Ahead
1000 = +0.0ns, 0111 = –0.4ns
1001 = +0.4ns, 0110 = –0.8ns
1010 = +0.8ns, 0101 = –1.2ns
1011 = +1.2ns, 0100 = –1.6ns
1100 = +1.6ns, 0011 = –2.0ns
1101 = +2.0ns, 0010 = –2.4ns
1110 = +2.4ns, 0001 = –2.8ns
1111 = +2.8ns, 0000 = –3.2ns
R/W 0
See
Note
1
Note: 1. PCIF / PCI Clock Skew is Skew1 (= Normal) or Skew1+Skew2 (= Late).
Byte27 Control Register
Bit Description Contents Type Default Note
7 Reserved R/W 0
6 PCIF_2 Skew Select Bit 0 = Normal, 1 = Late R/W 0
5 PCIF_1 Skew Select Bit 0 = Normal, 1 = Late R/W 0
4 PCIF_0 Skew Select Bit 0 = Normal, 1 = Late R/W 0
See
Note
1
3
3V66 Clock Skew Control
Bit3
R/W 1
2
3V66 Clock Skew Control
Bit2
R/W 0
1
3V66 Clock Skew Control
Bit1
R/W 0
0
3V66 Clock Skew Control
Bit0
Delay Ahead
1000 = +0.0ns, 0111 = –0.4ns
1001 = +0.4ns, 0110 = –0.8ns
1010 = +0.8ns, 0101 = –1.2ns
1011 = +1.2ns, 0100 = –1.6ns
1100 = +1.6ns, 0011 = –2.0ns
1101 = +2.0ns, 0010 = –2.4ns
1110 = +2.4ns, 0001 = –2.8ns
1111 = +2.8ns, 0000 = –3.2ns
R/W 0
Note: 1. Normal = Skew1(B26[3:0]), Late = Skew1(B26[3:0]) +Skew2 (B26[7:4]).