Texas Instruments MSP430x4xx - Manual (Page 194)

Watchdog Timer Operation
10-4 Watchdog Timer, Watchdog Timer+
10.2 Watchdog Timer Operation
The WDT module can be configured as either a watchdog or interval timer with
the WDTCTL register. The WDTCTL register also contains control bits to
configure the RST/NMI pin. WDTCTL is a 16-bit, password-protected,
read/write register. Any read or write access must use word instructions and
write accesses must include the write password 05Ah in the upper byte. Any
write to WDTCTL with any value other than 05Ah in the upper byte is a security
key violation and triggers a PUC system reset regardless of timer mode. Any
read of WDTCTL reads 069h in the upper byte.
10.2.1 Watchdog Timer Counter
The watchdog timer counter (WDTCNT) is a 16-bit up-counter that is not
directly accessible by software. The WDTCNT is controlled and time intervals
selected through the watchdog timer control register WDTCTL.
The WDTCNT can be sourced from ACLK or SMCLK. The clock source is
selected with the WDTSSEL bit.
10.2.2 Watchdog Mode
After a PUC condition, the WDT module is configured in the watchdog mode
with an initial ~32-ms reset interval using the DCOCLK. The user must setup,
halt, or clear the WDT prior to the expiration of the initial reset interval or
another PUC will be generated. When the WDT is configured to operate in
watchdog mode, either writing to WDTCTL with an incorrect password, or
expiration of the selected time interval triggers a PUC. A PUC resets the WDT
to its default condition and configures the RST/NMI pin to reset mode.
10.2.3 Interval Timer Mode
Setting the WDTTMSEL bit to 1 selects the interval timer mode. This mode can
be used to provide periodic interrupts. In interval timer mode, the WDTIFG flag
is set at the expiration of the selected time interval. A PUC is not generated
in interval timer mode at expiration of the selected timer interval and the
WDTIFG enable bit WDTIE remains unchanged.
When the WDTIE bit and the GIE bit are set, the WDTIFG flag requests an
interrupt. The WDTIFG interrupt flag is automatically reset when its interrupt
request is serviced, or may be reset by software. The interrupt vector address
in interval timer mode is different from that in watchdog mode.
Note: Modifying the Watchdog Timer
The WDT interval should be changed together with WDTCNTCL = 1 in a
single instruction to avoid an unexpected immediate PUC or interrupt.
The WDT should be halted before changing the clock source to avoid a
possible incorrect interval.