Texas Instruments MSP430x4xx - Manual (Page 205)

Basic Timer1 Introduction
11-5 Basic Timer1
11.2.4 Basic Timer1 Operation: Signal f
LCD
The LCD controller (but not the LCDA controller) uses the f
LCD
signal from the
BTCNT1 to generate the timing for common and segment lines. ACLK sources
BTCNT1 and is assumed to be 32768 Hz for generating f
LCD
. The f
LCD
frequency is selected with the BTFRFQx bits and can by ACLK/256,
ACLK/128, ACLK/64, or ACLK/32. The proper f
LCD
frequency depends on the
LCD’s frame frequency and the LCD multiplex rate and is calculated by:
f
LCD
= 2
×
mux
×
f
Frame
For example, to calculate f
LCD
for a 3-mux LCD, with a frame frequency of
30 - 100Hz:
f
Frame
(from LCD datasheet) = 30 - 100 Hz
f
LCD
= 2
Ч
3
Ч
f
Frame
f
LCD(min)
= 180 Hz
f
LCD(max)
= 600 Hz
select f
LCD
= 32768/128 = 256 Hz or 32768/64 = 512 Hz
The LCD_A controller does not use the Basic Timer1 for f
LCD
generation. See
the LCD Controller and LCD_A Controller chapters for more details on the LCD
controllers.
11.2.5 Basic Timer1 Interrupts
The Basic Timer1 uses two bits in the SFRs for interrupt control.
- Basic Timer1 interrupt flag, BTIFG, located in IFG2.7
- Basic Timer1 interrupt enable, BTIE, located in IE2.7
The BTIFG flag is set after the selected time interval and requests a Basic
Timer1 interrupt if the BTIE and the GIE bits are set. The BTIFG flag is reset
automatically when the interrupt is serviced, or can be reset with software.