Texas Instruments THUNDERSWITCH II TNETX4090 - Manual (Page 65)

TNETX4090
ThunderSWITCH II

9-PORT 100-/1000-MBIT/S ETHERNET

SWITCH
SPWS044E – DECEMBER 1997 – REVISED AUGUST 1999
65
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
PMA and GMII clock (see Figure 20)
NO. MIN MAX UNIT
1 tr(Mxx_GCLK) Pulse width low, Mxx_RFCLK 2.5 ns
2 th(Mxx_GCLK) Pulse width high, Mxx_RFCLK 2.5 ns
3 tw(Mxx_GCLK) Cycle time, Mxx_RFCLK 8 ns
PMA and GMII clock (see Figure 20)
NO. MIN MAX UNIT
1 tr(Mxx_GCLK) Rise time, Mxx_RFCLK 1 ns
2 tf(Mxx_GCLK) Fall time, Mxx_RFCLK 1 ns
3 Accuracy 100 PPM
duty cycle 40% 60%
† tr and tf are measured between 20% and 80%, VDD(3.3-V) = min, output load (GTCLK) = 20pf.
Mxx_RFCLK
1 2
3
Figure 20. GMII Clock