Rainbow Electronics NUC120 - Manual (Page 35)

NUC120 Series DATA SHEET
5.5 General Purpose I/O
5.5.1 Overview and Features
Up to 80 General Purpose I/O pins can be shared with other function pins; it depends on the chip
configuration. These 80 pins are arranged in 5 ports named with GPIOA, GPIOB, GPIOC, GPIOD and
GPIOE. Each port equips maximum 16 pins. Each one of the 80 pins is independent and has the
corresponding register bits to control the pin mode function and data.
The I/O type of each of I/O pins can be independently software configured as input, output, open-drain
or quasi-bidirectional mode. The all pins of I/O type stay in quasi-bidirectional mode and port data
register GPIOx_DOUT[15:0] resets to 0x000_FFFF. Each I/O pin equips a very weakly individual pull-
up resistor which is about 110K
Ω~300KΩ for V
DD
is from 5.0V to 2.5V.
5.5.1.1 Input Mode Explanation
Set GPIOx_PMD (PMDn[1:0]) to 00b the GPIOx port [n] pin is in Input mode and the I/O pin is in tri-state
(high impedance) without output drive capability. The GPIOx_PIN value reflects the status of the
corresponding port pins.
5.5.1.2 Output Mode Explanation
Set GPIOx_PMD ( PMDn[1:0]) to 01b the GPIOx port [n] pin is in Output mode and the I/O pin supports
digital output function with source/sink current capability. The bit value in the corresponding bit [n] of
GPIO_DOUT is driven on the pin.
Port Pin
Input Data
Port Latch
Data
P
N
VDD
Figure 5-8 Push-Pull Output
Publication Release Date: May 31, 2010
- 35 - Revision V1.02