3 open-drain mode explanation, 4 quasi-bidirectional mode explanation, Nuc120 series data sheet – Rainbow Electronics NUC120 User Manual

Page 36

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NUC120 Series DATA SHEET

5.5.1.3

Open-Drain Mode Explanation

Set GPIOx_PMD (

PMDn[1:0]) to 10b the GPIOx port [n] pin is in Open-Drain mode and the I/O pin

supports digital output function but only with sink current capability, an additional pull-up resister is
needed for driving high state. If the bit value in the corresponding bit [n] of GPIOx_DOUT is “0”, the pin
drive a “low” output on the pin. If the bit value in the corresponding bit [n] of GPIOx_DOUT is “1”, the
pin output drives high that is controlled by the internal pull-up resistor or the external pull high resistor.

Port Pin

Port Latch

Data

N

Input Data

Figure 5-9 Open-Drain Output

5.5.1.4

Quasi-bidirectional Mode Explanation

Set GPIOx_PMD (

PMDn[1:0]) to 11b the GPIOx port [n] pin is in Quasi-bidirectional mode and the I/O

pin supports digital output and input function at the same time but the source current is only up to
hundreds uA. Before the digital input function is performed the corresponding bit in GPIOx_DOUT
must be set to 1. The quasi-bidirectional output is common on the 80C51 and most of its derivatives. If
the bit value in the corresponding bit [n] of GPIOx_DOUT is “0”, the pin drive a “low” output on the pin.
If the bit value in the corresponding bit [n] of GPIOx_DOUT is “1”, the pin will check the pin value. If
pin value is high, no action takes. If pin state is low, then pin will drive strong high with 2 clock cycles
on the pin and then disable the strong output drive and then the pin status is control by internal pull-up
resistor. Note that the source current capability in quasi-bidirectional mode is only about 200uA to
30uA for VDD is form 5.0V to 2.5V

Port Pin

2 CPU

Clock Delay

Input Data

Port Latch

Data

P

P

P

N

VDD

Strong

Very

Weak

Weak

Figure 5-10 Quasi-bidirectional I/O Mode

Publication Release Date: May 31, 2010

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Revision V1.02

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