Rainbow Electronics ATtiny12 - Manual (Page 23)

23
ATtiny11/12
1006C–09/01
Watchdog Reset When the Watchdog times out, it will generate a short reset pulse of 1 CK cycle dura-
tion. On the falling edge of this pulse, the delay timer starts counting the Time-out period
(t
TOUT
). Refer to page 34 for details on operation of the Watchdog.
Figure 22. Watchdog Reset during Operation
MCU Status Register –
MCUSR of the ATtiny11 The MCU Status Register provides information on which reset source caused an MCU
reset.
• Bit 7..2 - Res: Reserved Bits
These bits are reserved bits in the ATtiny11 and always read as zero.
• Bit 1 - EXTRF: EXTernal Reset Flag
After a power-on reset, this bit is undefined (X). It will be set by an external reset. A
watchdog reset will leave this bit unchanged.
• Bit 0 - PORF: Power-on Reset Flag
This bit is set by a power-on reset. A watchdog reset or an external reset will leave this
bit unchanged.
To summarize, the following table shows the value of these two bits after the three
modes of reset.
To identify a reset condition, the user software should clear both the PORF and EXTRF
bits as early as possible in the program. Checking the PORF and EXTRF values is done
before the bits are cleared. If the bit is cleared before an external or watchdog reset
occurs, the source of reset can be found by using the following truth table:
CK
V
CC
Bit 7 6 5 4 3 2 1 0
$34 - - - - - - EXTRF PORF MCUSR
Read/Write R R R R R R R/W R/W
Initial Value 0 0 0 0 0 0 See bit description
Table 11. PORF and EXTRF Values after Reset
Reset Source EXTRF PORF
Power-on Undefined 1
External Reset 1 Unchanged
Watchdog Reset Unchanged Unchanged