Clock implementation – Rainbow Electronics AT84AD004 User Manual

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AT84AD004

5390A–BDC–06/04

Figure 52. Termination Method for the ADC Analog Inputs in AC Coupling Mode

Clock Implementation

The ADC features two different clocks (I or Q) that must be implemented as shown in
Figure 53. Each path must be AC coupled with a 100 nF capacitor.

Figure 53. Differential Termination Method for Clock I or Clock Q

Note:

When only clock I is used, it is not necessary to add the capacitors on the CLKQ and
CLKQN signal paths; they may be left floating.

Channel I

Channel Q

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Source

VinI

VinIB

VinQ

VinQB

VinI

VinIB

VinQ

VinQB

Dual ADC

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50

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50

GND

GND

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Source

GND

GND

ADC Package

VCCD/2

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100 nF

100 nF

Differential Buff

er

CLK

CLKB

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