Rainbow Electronics AT86RF230 - Manual (Page 19)

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AT86RF230
5131A-ZIGB-06/14/06
even after the maximum number of retries, it will abort the transaction, raise the TRX_END interrupt, and set the
value of the TRAC_STATUS register bits to CHANNEL_ACCESS_FAILURE.
Upon the detection of a clear channel, the transceiver starts the frame transmission. It parses the frame as it is
transmitted to check if an ACK reply will be expected. If no ACK is expected, the transceiver will raise an interrupt
after the frame transmission completes. The value of register bits TRAC_STATUS (register 0x02) is set to
SUCCESS.
On the other hand, if the transmitted frame requires an ACK, the transceiver switches into receive mode to wait for
a valid ACK reply. If no valid ACK is received, the transceiver will retry the entire transaction, including CSMA/CA
execution, until the frame has been acknowledged or the maximum number of retransmissions (as set by the
register bits MAX_FRAME_RETRIES in register 0x2C) has been reached. In this case, the TRX_END interrupt is
raised and the value of TRAC_STATUS is set to NO_ACK.
If a valid ACK is found, the TRX_END interrupt will be raised. In this case, TRAC_STATUS is set to SUCCESS.
5.3.3. RX_AACK_NOCLK
If the radio is listening for an incoming frame and the controller is not running an application, the controller can be
powered down to decrease the total system power consumption. This special power down scenario (similar to
RX_ON_NOCLK) for controllers running in synchronous mode is supported by the AT86RF230 using the state
RX_AACK_NOCLK.
The state can only be entered by setting SLP_TR = 1 while the IC is in the RX_AACK_ON mode. The CLKM pin
will be disabled 35 clock cycles after the rising edge at the SLP_TR pin. This will enable the controller to complete
its power down sequence.
In RX_AACK_NOCLK mode, the transceiver listens for IEEE 802.15.4 frames. Should the AT86RF230 detect an
Start-of-Frame-Delimiter, it will enter the BUSY_RX_AACK_NOCLK state, and it will start to receive the frame. If
the frame passes the address filter, the AT86RF230 enters the BUSY_RX_AACK state, and the clock supplied to
the micro-controller is turned back on. The controller may now process the incoming frame.
If the received frame has a valid CRC, and if it requires an acknowledgement, the transceiver will automatically
generate and transmit an ACK frame.
The end of the transaction is signaled to the controller by an TRX_END interrupt. After the transaction has been
completed, the transceiver will enter the RX_AACK_ON state. The transceiver will only re-enter the
RX_AACK_NOCLK state when the SLP_TR has been reset to “0”, and afterwards set to “1” again.
If the transceiver is in the RX_AACK_NOCLK state, and the SLP_TR pin is reset to “0”, it will enter the
RX_AACK_ON state, and it will again start to supply the micro-controller with the clock signal.