GE Industrial Solutions CP2000DC54-PE - Manual (Page 7)

GE
Data Sheet
CP2000DC54-PE series dc-dc converter
Input: -40Vdc to -72Vdc; Outputs: ±54Vdc @ 2000W; 5Vdc @ 4W
August 20, 2013
©2013 General Electric Company. All rights reserved. Page 7
request to either of the two SMBAlert# signals when
required.
Non-supported commands: Non supported commands are
flagged by setting the appropriate STATUS bit and issuing an
SMBAlert# to the ‘host’ controller.
Data out-of-range: The power supply validates data
settings and sets the data out-of-range bit and SMBAlert# if
the data is not within acceptable range.
SMBAlert# triggered by the µC: The µC driven SMBAlert#
signal informs the ‘master/host’ controller that either a
STATE or ALARM change has occurred. Normally this signal
is HI. The signal will change to its LO level if the power
supply has changed states and the signal will be latched LO
until the power supply receives a ‘clear’ instruction as
outlined below. If the alarm state is still present after the
‘clear_faults’ command has been received, then the signal
will revert back into its LO level again and will latch until a
subsequent ‘clear’ signal is received from the host controller.
The signal will be triggered for any state change, including
the following conditions;
 VIN under or over voltage
 Vout under or over voltage
 IOUT over current
 Over Temperature warning or fault
 Fan Failure
 Communication error
 PEC error
 Invalid command
 Internal faults
The power supply will clear the SMBusAlert# signal (release
the signal to its HI state) upon the following events:
 Completion of a ‘read_status’ instruction
 Receiving a CLEAR_FAULTS command
 The main output recycled (turned OFF and then ON) via
the ENABLE signal pin
 The main output recycled (turned OFF and then ON) by
the OPERATION command
SMBAlert# triggered by the PCA9541: If clearing the Alert#
signal via the clear_faults or read back fails, then reading
back the Alert# status of the PCA9541 will be necessary
followed by clearing of the PCA9541 Alert#.
The PCA9541 can issue an Alert# even when single bus
operation is selected where the bus master selector has not
been used or addressed. This may occur because the
default state of the PCA9541/01 integrated circuit issues
Alert# to both i
2 C lines for all possible transitioning states of
the device. For example, a RESET caused by a glitch would
cause the Alert# to be active.
If the PCA9541 is not going to be used in a specific
application (such as when only a single I 2 C line is utilized),
it is imperative that interrupts from the PCA9541 are de-
activated by the host controller. To de-activate the interrupt
registers the PCA9541 the ‘master’ needs to address the
PCA9541 in the ‘write’ mode, the interrupt enable (IE)
register needs to be accessed and the interrupt masks have
to be set to HI ‘1’. (Note: do not mask bit 0 which transmits
Alert# from the power supply). This command setting the
interrupt enable register of the PCA9541 is shown below;
Start Unit Address ACK
1 7 6 5 4 3 2 1 0 1
S 1 1 1 0 A2 A1 A0
0 A
Command Code ACK IE Register Stop
8 1 8
0x00 A 0x0E P
There are two independent interrupt enable (IE) registers,
one for each controller channel (I
2 C-0 and I 2 C-1). The
interrupt register of each channel needs to be configured
independently. That is, channel I
2 C-0 cannot configure the IE
register of I 2 C-1 or vise-versa.
This command has to be initiated to the PC9541 only once
after application of power to the device. However, every
time a restart occurs the PCA9541 has to be reconfigured
since its default state is to issue Alert# for changes to its
internal status.
If the application did not configure the interrupt enable
register the Alert# line can be cleared (de-activated), if it has
been activated by the PCA9541, by reading back the data
from the interrupt status registers (Istat).
Refer to the PCA9541 data sheet for further information on
how to communicate to the PCA9541 multiplexer.
Please note that the PCA9541 does not support Packet Error
Checking (PEC).
Re-initialization: The I 2 C code is programmed to re-initialize
if no activity is detected on the bus for 5 seconds. Re-
initialization is designed to guarantee that the I
2 C
µController does not hang up the bus. Although this rate is
longer than the timing requirements specified in the SMBus
specification, it had to be extended in order to ensure that a
re-initialization would not occur under normal transmission
rates. During the few µseconds required to accomplish re-
initialization the I 2 C µController may not recognize a
command sent to it. (i.e. a start condition).
Global broadcast: This is a powerful command because it
can instruct all power supplies to respond simultaneously in
one command. But it does have a serious disadvantage.
Only a single power supply needs to pull down the ninth
acknowledge bit. To be certain that each power supply
responded to the global instruction, a READ instruction
should be executed to each power supply to verify that the
command properly executed. The GLOBAL BROADCAST
command should only be executed for write instructions to
slave devices.
Note: The PCA9541 i2c master selector does not respond to
the GLOBAL BROADCAST command.
Read back delay: The power supply issues the SMBAlert #
notification as soon as the first state change occurred.
During an event a number of different states can be
transitioned to before the final event occurs. If a read back is
implemented rapidly by the host a successive SMBAlert#
could be triggered by the transitioning state of the power
supply. In order to avoid successive SMBAlert# s and read
back and also to avoid reading a transitioning state, it is
prudent to wait more than 2 seconds after the receipt of an
SMBAlert# before executing a read back. This delay will