Teledyne LeCroy Summit T24 PCIe Multi-lane Protocol Analyzer User Manual - Manual (Page 218)

Teledyne LeCroy PCIe SSD Base Address Mapping
206 Summit T24 PCI Express Multi‐Lane Protocol Analyzer User Manual
Figure 10.31: PCIe SSD Configuration Dialog
The MBAR field in this dialog is required and editable. Make sure that the information
entered is correct. Click on any field and the description displays in the bottom read‐only
box (see
Figure 10.34 on page 209 ). Some important fields are described below:
 Device: There is only one device node, (support for multiple device trace decod‐
ing will be available in a later release). If there is no device node, then the user
can add a device node by clicking the Add Device button.
 MBAR: The 64‐bit main address bar (i.e. BAR1:BAR0). Without this value
decoding cannot be done. It should be in "0x" hex format.
 Ports: Under this node the user can add more missing nodes to decode the cur‐
rent trace. Click the Add port or Delete Port button to add or delete a port node.
Enter CLB, CLBU and FB, FBU address fields. The address is 32 bit and should be
in "0x" hex format. Please use the right value for size as it is an important attri‐
bute. Consult the AHCI specifications for the correct value.
Clicking the Re‐Decode button erases the current configuration from this dialog box and
attempts to re‐decode based on the information present in the open trace and/or saved
on the disk with the last decode.