Spi timing requirements, 4 spi timing requirements – PNI RM3100 Evaluation Board User Manual

Page 13

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PNI Sensor Corporation

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RM3100 Evaluation Board User Manual

Page 12 of 33

pre-defined in hardware, SA0 establishes the 7-bit slave address of the RM3100

Evaluation Board on the I

2

C bus.

SA1 (pin 2)

SA1 represents the second-least significant bit in the RM3100 Evaluation Board’s
slave address. Pulling this HIGH represents a ‘1’ and pulling it low represents a ‘0’.
Along with pin 28 (bit 0) and the higher 5 bits (0b01000), which are pre-defined in

hardware, SA1 establishes the 7-bit slave address of the module on the I

2

C bus.

4.4 SPI Timing Requirements

The RM3100 Evaluation Board can act as a slave device on either a SPI or I

2

C bus. This

section discusses basic requirements for SPI operation. The SPI interface consists of four

signals, as carried on SCK, (MO)SI, (MI)SO, and SSN. The SPI clock, SCK, should run at

1 MHz or less. Data sent out on MOSI is considered valid while SCK is HIGH, and data is

in transition when SCK is LOW. The first byte sent to the RM3100 Evaluation Board

contains the Read/Write bit (Write=0) followed by the 7-bit register address. When the

register address byte is received the module returns the STATUS register contents.

Assuming SSN stays low and SCK continues, multiple registers can be written to or read

from as the RM3100 Evaluation Board will automatically increment to the next register

address. The clock polarity when the bus is idle can either be LOW (CPOL=CPHA=0) or

HIGH (CPOL=CPHA=1).

As long as SSN is LOW data can transfer to or from the RM3100 Evaluation Board.

Generally it is a good idea to pull SSN to HIGH after a read or write operation has completed

such that the SPI bus can be freed up for other devices. The module can perform

measurements while the SSN line is HIGH, as this does not involve communication with the

master. Pulling the SSN to HIGH during a data read or write will terminate the transaction.

The timing parameters, defined in Figure 4-1 or Figure 4-2 and specified in Table 4-2, must

be met to ensure reliable communication.

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