Agilent Technologies DP111 - Manual (Page 28)

User Manual: Agilent Acqiris 8-bit Digitizers Page 28 of 59
These states can be logically combined with AND, OR, NAND, or NOR to define the overall trigger condition.
Potential triggers can then occur on the FALSE to TRUE transitions of the combined signal.
There is a small (~ns) delay between the times at which two simultaneous inputs arrive at the logical element that
defines the overall trigger condition. If necessary, this must be corrected for by cable delay on the external input; the
delay will depend on the overall configuration and therefore must be determined by the user.
3.4.9. Pre- and Post-Trigger Delay
To increase trigger flexibility a pre- or post-trigger delay can be applied to the trigger position.
The amount of pre-trigger delay can be adjusted between 0 and 100% of the acquisition time window (i.e. sampling
interval x number of samples), whereas the post-trigger delay can be adjusted between 0 and 200 million samples.
The U1071A-FAMILY allows a post trigger delay of up to 2
34 - 1 samples.
Pre- or post-trigger delays are just different aspects of the same trigger positioning parameter:
• The condition of 100% pre-trigger indicates that all data points are acquired prior to the trigger, i.e. the trigger
point is at the end of the acquired waveform.
• The condition of 0% pre-trigger (which is identical to a post-trigger of 0) indicates that all data points are
acquired immediately after the trigger, i.e. the trigger point is at the beginning of the acquired waveform.
• The condition of a non-zero post-trigger delay indicates that the data points are acquired after the trigger occurs,
at a time that corresponds to the post-trigger delay, i.e. the trigger point is before the acquired waveform.
The digitizer hardware accepts pre- and post-trigger adjustments in increments of 16 samples. By definition post-
trigger settings are a positive number and pre-trigger settings are a negative number.
Thus it is only natural that the software drivers treat pre- and post-trigger delays as a single parameter in seconds that
can vary between –nbrSamples * samplingInterval (100% pre-trigger) and +maxPostTrigSamples * samplingInterval
(max post-trigger). Since the Acqiris software drivers provide very accurate trigger position information upon
waveform readout, the accepted resolution of the user-requested pre-/post-trigger delay is much better than 16
samples. For more details, refer to the Programmer’s Guide.
3.4.10. Trigger Status
The front panel includes a tri-color LED indicator to show the status of the trigger. When the LED is green it
indicates the trigger is armed and waiting for a valid trigger to occur. Red indicates that the trigger has occurred, the
acquisition is complete and the data is waiting to be readout. For the U1071A-FAMILY a yellow LED is an
indication of a timeout when the PC tried to communicate with the module. The user can override the default
functions and program the LED color in an application-specific manner.
3.5. External Clock and Reference
For applications where the user wants to replace the internal clock of the digitizer and drive the ADC with an
external source, either an External Clock or an External Reference signal can be used. The Clock or Reference
signals can be entered into the digitizer either by the dedicated MMCX (DC271-FAMILY), MCX (U1071A-
FAMILY), or BNC (DC240) connector or via the shared External Input connector on the front panel (all other
models). In addition, for the DC135/DC135HZ/DC140/DC140HZ/DC211/DC211A/DC241/DC241A/
DC271/DC271A/DC271AR models, the PXI Bus 10 MHz system clock signal (PXI_CLK10) can be used as the
reference.
With External Clock two operating modes are possible; Continuous for the case in which the clock signals are always
present and Start/Stop for the situation where the user needs complete control of the sampling process. The Start/Stop
mode is not available for the U1071A-FAMILY. When using a Continuous External Clock, the user must ensure that
the input signal has a frequency between 20 MHz and 2 GHz (U1071A-FAMILY and DC271-FAMILY) or between
10 MHz and 500 MHz (all other models). For the Start/Stop mode the input signal frequency must be less than 1
GHz (DC271-FAMILY) or 500 MHz (all other models). In all cases it must have a minimum peak to peak amplitude
into 50
Ω at the front of the digitizer of at least
ƒ 0.5 V for DC135/DC135HZ/DC140/DC140HZ/DC211A/DC241A/DC271A/DC271AR/U1071A-FAMILY
ƒ 1 V all other DC271-FAMILY and
ƒ 2 V for other models.