Agilent Technologies DP111 - Manual (Page 26)

User Manual: Agilent Acqiris 8-bit Digitizers Page 26 of 59
when the AS bus is present. The number of segments (Ns) available per bank (Nb) must respect the constraint that
the total Nb * Ns < 1000.
3.3.5. Timing
A crystal-controlled timebase is used to clock the ADC system of the digitizers. The timebase accuracy is guaranteed
as shown in the table at the beginning of this section. The digitizers also include a built-in Trigger Time Interpolator
(TTI) that measures the time from the trigger point to the first sample point. This information is essential for
determining the precise relation between the trigger or other event of interest and the digitized samples of the signal.
The approximate TTI resolution is also given in the table at the beginning of this section.
3.3.6. Timebase Range
The timebase range defines the time period over which data is being acquired. For example, the DC110 has a
standard acquisition memory of 128 Kpoints and maximum sampling rate of 1 GS/s. Therefore, at the maximum
sampling rate, the digitizer can record a signal over a timebase range of up to 130
μs (approx. 130,000 points *
1 ns/point). The timebase range can be adjusted by varying the amount of acquisition memory or the sampling rate of
the digitizer.
3.3.7. Combining channels
The DC135/DC135HZ/DC140/DC140HZ/DC241/DC241A/DC271/DC271A/DC271AR/DP235/DP240/U1071A-
FAMILY digitizers offer the possibility of combining the converters (and their memories) from two or four channels
to analyze a single input channel. With this feature the maximum sampling rate and the maximum amount of
acquisition memory can be doubled or quadrupled if all of the input channels are not of immediate interest.
3.4. Trigger
Normally the trigger settings applied to the digitizer are used to determine the time at which the device will stop
acquiring data. Some models are also capable of a ‘Start on Trigger’ mode of acquisition (see the Programmer’s
Guide for further details). The various trigger settings are outlined below.
3.4.1. Trigger Source
The trigger source can be a signal applied to either an Input Channel (internal triggering) or the External Trigger
Input. For the DC135/DC135HZ/DC140/DC140HZ/DC211/DC211A/DC241/DC241A/DC271/DC271A/DC271AR
modules, a standardized trigger in signal can also be routed via the PXI Bus Star Trigger line.
Most digitizers provide a separate front panel input BNC connector that can be used as an External Trigger Input.
The External Input provides a fully functional trigger circuit with selectable level and slope as for the Internal
Triggering source; however it does not include coupling choices nor HF, Window, and Spike Stretcher triggers. The
external trigger termination (1 M
Ω or 50 Ω) is also selectable on many modules. In modules with this feature, the
circuit also provides an overload protection that will automatically switch the coupling from 50 Ω to 1 MΩ if the
signal is greater than ±5 V DC.
The DC271-FAMILY digitizers have a fixed 50 Ω termination impedance. They also allow the same BW limiter
selections as can be found for the channels. The DC271-FAMILY digitizers' external trigger circuit has diode
protection against overload.