Trigger coupling, Trigger level, Edge trigger slope – Agilent Technologies DP111 User Manual

Page 27: Window trigger, Hf trigger, Spike stretcher, U1071a-family multi-source trigger

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User Manual: Agilent Acqiris 8-bit Digitizers

Page 27 of 59

The U1071A-FAMILY also gives the choice of 50

Ω or 1 MΩ termination impedance for the MCX external input

and has diode protection against overload. However, there are no BW limiters and only DC trigger coupling is
available.

In all 50

Ω cases a ±5 V limit on trigger signals should be respected, although somewhat higher voltages for short

time periods will not damage the unit. For 1 M

Ω input signals up to ±100 V (DC + peak AC < 10 KHz) are allowed.

3.4.2. Trigger Coupling

Trigger coupling is used to select the coupling mode applied to the input of the trigger circuitry. Modes available
include AC LF Reject and DC. The AC LF Reject mode couples signals capacitively and removes the input signal's
DC component and signals below 50 KHz (50 Hz for DC271-FAMILY digitizers). DC mode allows all signal
components to be passed through to the trigger circuit. The DC271-FAMILY digitizers have an HF Reject mode that
removes signal components above 50 KHz.

3.4.3. Trigger Level

The trigger level specifies the voltage at which the selected trigger source will produce a valid trigger. The trigger
level is defined as a set voltage. Using the internal trigger, the level is set with respect to the midpoint voltage (V

m

= –

Offset voltage)

of the digitizer’s vertical scale. Internal trigger level settings (expressed in %) must be within V

m

±

0.6 FS (0.5 FS for DC271-FAMILY digitizers), where FS is the channel Full Scale. All trigger circuits have
sensitivity levels that must be exceeded in order for reliable triggering to occur.

For most digitizers, the AC coupled mode is implemented with an auto-level trigger. Only the DC271-FAMILY
digitizers allow trigger levels to be selected in connection with the AC coupling choices.

The DC271-FAMILY digitizers allow the user to choose the external trigger Full Scale from the set of values 0.5,
1.0, 2.0 or 5.0 V. The external trigger level can then be set to values in the range ± 0.5 FS. The U1071A-FAMILY
has a single external Trigger Full Scale of 10 V. All other digitizers have an external trigger range of ± 3 V.

The DC271-FAMILY digitizers will trigger on signals with a peak-peak amplitude > 15% FS from DC to their
bandwidth limit.

3.4.4. Edge Trigger Slope

The trigger slope defines which one of the two possible transitions will be used to initiate the trigger when it passes
through the specified trigger level. Positive slope indicates that the signal is transitioning from a lower voltage to a
higher voltage. Negative slope indicates the signal is transitioning from a higher voltage to a lower voltage.

3.4.5. Window Trigger

The DC271-FAMILY digitizers and the 2 channels of the U1071A-FAMILY implement a Window trigger. Two
trigger level thresholds are used to define the desired range. The trigger can then be chosen to occur either when the
signal exits or enters the window range. This mode can be thought of as the appropriate OR of two edge triggers of
opposite slope.

3.4.6. HF Trigger

The DC271-FAMILY digitizers and the 2 channels of the U1071A-FAMILY implement an HF trigger that allows
triggers to be reliably accepted at rates above

∼ 1 GHz. In this mode, triggers occur on every fourth positive edge.

The window trigger mode is not available.

3.4.7. Spike Stretcher

The trigger circuit of the 2 channels of the U1071A-FAMILY also has a Spike Stretcher mode which ensures that
even very short pulses are capable of generating triggers. This mode is useful if the time interval during which the
trigger signal satisfies the threshold condition is less than 0.5 ns and the trigger frequency is less than 10 MHz. The
trigger slope is positive in this mode.

3.4.8. U1071A-FAMILY Multi-source Trigger

This digitizer permits triggers that require a pattern condition including one of the trigger channels and the external
trigger. The trigger condition defined above, on each of the inputs, defines the TRUE/FALSE state of each input.

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