2 chipset chipset chipset chipset chipset, Cpu l1 & l2 cache [enabled, Dram clock/drive control – Asus Motherboard P5VD2-MX User Manual

Page 69: Configuration options: [disabled] [enabled, Configuration options: [2] [3] [4] [5, Configuration options: [2t] [3t] [4t] [5t

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A S U S P 5 V D 2 - M X / P 5 V - V M D H

A S U S P 5 V D 2 - M X / P 5 V - V M D H

A S U S P 5 V D 2 - M X / P 5 V - V M D H

A S U S P 5 V D 2 - M X / P 5 V - V M D H

A S U S P 5 V D 2 - M X / P 5 V - V M D H

2 - 2 1

2 - 2 1

2 - 2 1

2 - 2 1

2 - 2 1

CPU L1 & L2 Cache [Enabled]

CPU L1 & L2 Cache [Enabled]

CPU L1 & L2 Cache [Enabled]

CPU L1 & L2 Cache [Enabled]

CPU L1 & L2 Cache [Enabled]

Configuration options: [Disabled] [Enabled]

Select Menu

Item Specific Help

Phoenix-Award BIOS CMOS Setup Utility

Advanced

Chipset

DRAM Clock/Drive Control

Frequency/Voltage control

Top Performance [Disabled]
Primary Display Adapter [PCI-E]
VGA Share Memory Size

[64M]

2.4.2

2.4.2

2.4.2

2.4.2

2.4.2

Chipset

Chipset

Chipset

Chipset

Chipset

DRAM Clock/Drive Control

DRAM Clock/Drive Control

DRAM Clock/Drive Control

DRAM Clock/Drive Control

DRAM Clock/Drive Control

Select Menu

Item Specific Help

Phoenix-Award BIOS CMOS Setup Utility

Advanced

DRAM Clock/Drive Control

Current DRAM Frequency

200MHz

DRAM Frequency

DRAM Timing Selectable

[By SPD]

x CAS Latency Time

4

x Bank Interleave

Disabled

x Precharge to Active(Trp)

4T

x Active to Precharge(Tras)

07T

x Active to CMD(Trcd)

4T

x REF to ACT/REF(Trfc)

20T/21T

x ACT(0) to ACT(1) (TRRD)

3T

Auto

DRAM Frequency [Auto]
Configuration options: [Auto] [400 MHz] [533 MHz]

DRAM Timing Selectable [By SPD]
Configuration options: [Manual] [By SPD]

The following items are user-configurable when the “ D R A M T i m i n g

“ D R A M T i m i n g

“ D R A M T i m i n g

“ D R A M T i m i n g

“ D R A M T i m i n g

S e l e c t a b l e ”

S e l e c t a b l e ”

S e l e c t a b l e ”

S e l e c t a b l e ”

S e l e c t a b l e ” item is set to [Manual].

C A S L a t e n c y T i m e [ 4 ]

C A S L a t e n c y T i m e [ 4 ]

C A S L a t e n c y T i m e [ 4 ]

C A S L a t e n c y T i m e [ 4 ]

C A S L a t e n c y T i m e [ 4 ]

Configuration options: [2] [3] [4] [5]

B a n k I n t e r l e a v e [ D i s a b l e d ]

B a n k I n t e r l e a v e [ D i s a b l e d ]

B a n k I n t e r l e a v e [ D i s a b l e d ]

B a n k I n t e r l e a v e [ D i s a b l e d ]

B a n k I n t e r l e a v e [ D i s a b l e d ]

Configuration options: [Disabled] [2 Bank] [4 Bank] [8 Bank]

P r e c h a r g e t o A c t i v e ( T r p ) [ 4 T ]

P r e c h a r g e t o A c t i v e ( T r p ) [ 4 T ]

P r e c h a r g e t o A c t i v e ( T r p ) [ 4 T ]

P r e c h a r g e t o A c t i v e ( T r p ) [ 4 T ]

P r e c h a r g e t o A c t i v e ( T r p ) [ 4 T ]

Configuration options: [2T] [3T] [4T] [5T]

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