AMD ATHLON K - Manual (Page 6)

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AMD Athlon™ Processor Model 4 Revision Guide 23614K—October 2003
Preliminary Information
5 MCA Bus Unit Control Register MSR 408H Returns Incorrect Information
Products Affected. A4, A5, A6, A7, A9
Normal Specified Operation. System reads to MSR 408h, MCA Bus Unit Control Register MC2_CTL, should
return correct information—the lower 32 bits in EAX and all zeros for the upper 32 bits in EDX.
Non-conformance. A read to the Machine Check Architecture (MCA) Bus Unit Control MSR 408h
(MC2_CTL) returns incorrect information in EDX. It returns the information stored in the upper 32
bits of the BU Status MSR 409h (MC2_STATUS) instead.
Potential Effect on System. If the system reads this MCA control register, the upper 32 bits, which are
reported in EDX, can contain unexpected data.
Suggested Workaround. This register is only implemented as a 32-bit register. Ignore the upper 32 bits
which are reported in EDX.
Resolution Status. No fix planned.