CH Tech Pulse Generator - Manual (Page 21)

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4.0 OPERATING INSTRUCTIONS
The VX462B provides three normal modes, three triggered modes, and three special modes of
operation, along with voltage level programming, output disconnect, and pulse enable controls. A
functional block diagram is show in Figure 11. These operational modes are configured,
controlled, and statused through on-board registers accessible through the VXI backplane. Refer
to paragraph 3.5.2 for register bit definitions.
TRIG IN/GATE
CONTROL
VOLTAGE REF
TRIG IN/GATE
TRIG OUT
PULSE OUT
FRONT
PANEL
OUTPUT
LOGIC
CLOCK
LOGIC
REFERENCE
GENERATOR
LOGIC
PULSE
GENERATION
Figure 11. Functional Block Diagram
4.1
LOGICAL ADDRESS
Addressing the VX462B is a function of the logical address switch (see paragraph
3.2) and the VXI host address modifier code. The logical address has a range of 0 to 255. Any
value within this range is valid, but care should be taken not to set the logical address the same as
another module in the system. Position 1 on the switch is the most significant bit and has a
weighted value of 128 when the switch is in the off position. Position 8 on the switch is the least
significant bit and has a weighted value of 1 when the switch is in the off position. The sum of the
weighted values of all the switches in the off position is the module address. The VXI secondary
address is the Logical Address divided by 8.
For VME users, the board may be accessed in A32, A24, or A16 address space, although the
VX462B decodes only the A16 address. The VME address is:
Address = VME D16 Address Space + (LA * 64) + C000h.
For example, if a VME D16 address space = FF0000h, and the VX462B Logical Address = 8:
Address = FF0000h + (8 * 64) + C000h = FFC200h.