Kontron CP6003-RC IPMI - Manual (Page 13)

CP6003-SA/RA/RC IPMI Firmware
ID 1045-5656, Rev. 2.0 Page 13
P R E L I M I N A R Y
Fur further information on the kipmi uEFI Shell command, refer to the CP6003-SA/RA/RC uEFI
BIOS User Guide. When uEFI BIOS stores the configuration, it creates an “IPMI Device Infor-
mation Record” entry in the SMBIOS table. This record contains information, among others,
about:
• Type of the supported interface (KCS style)
• Selected interrupt (10, 11 or none).
This information is required by the CP6003-SA/RA/RC payload’s IPMI OS kernel drivers for
Linux during their loading time. After the loading, most available IPMI communications tools
which access the IPMI controller via IPMI OS drivers should work (e.g. “ipmicmd”, “ipmitool”,
etc.).
Now it is possible to use such a tool to issue the Set Firmware Parameters OEM IPMI
command to modify the configuration again. Changing the interrupt number always requires a
uEFI BIOS restart for a correct setup of the SMBIOS table.
2.3 IPMI Setup for the Rack
For a working IPMI configuration the SDRR of the BMC must be filled with all sensor data re-
cords of all IPMI controllers in the rack. After every system start the BMC uses the SDRR to
initialize all sensors of all boards. The SDRR setup must be done by a management tool e.g.
the open Linux tool “ipmitool”. Then the command is:
This will work only if the IPMI controller configured as BMC is addressed. This addressing is
the default if the “ipmitool” is running on the payload side of the board where the BMC is resid-
ing.
3. IPMI Controller Hardware
On the CP6003-SA/RA/RC, the IPMI controller is implemented using the NXP ARM7 microcon-
troller with 512 kB of internal flash and 56 kB of RAM.
An external 64 kB serial EEPROM chip is used for firmware private data and FRU inventory
storage. An additional external 2 MB serial SPI flash is used for redundant firmware image stor-
age.
The IPMI controller implements a local Keyboard Controller Style (KCS) interface (KCS) with
interrupt support for communication with system-side management software and the uEFI BI-
OS. The IPMB bus is used for interconnection with the BMC or the shelf manager.
IPMI over LAN (IOL) and Serial Over LAN (SOL) are supported on four Ethernet channels
(GbE A – GbE D) of the board. SOL is only available on one Ethernet channel at a time.
The IPMI controller provides access to various board sensors which permit the monitoring of:
• System power voltages: 5V (PWR), 3.3V, IPMI 5V, 12V, IPMI controller supply 4.7V
• Temperatures: CPU die, chipset, and board temperature
• Power Good, IPMB-0 link, board reset, POST code, boot error, CPU states (processor
hot, THERMTRIP, …), IPMB-L state, Health error, IPMI watchdog etc.
ipmitool sdr fill sensors