ADLINK cPCI-3510 Series - Manual (Page 39)

Functional Description 25
cPCI-3510
3.2 Platform Controller Hub
The Mobile Intel® QM87 Express Chipset provides extensive I/O
support. Functions and capabilities include:
X The QM87 PCH provides extensive I/O support, functions
and capabilities including:
X PCI Express Base Specification, Revision 2.0 support for up
to eight ports with transfers up to 5 GT/s
X ACPI Power Management Logic Support, Revision 4.0a
X Enhanced DMA controller, interrupt controller, and timer
functions
X Integrated Serial ATA host controllers with independent
DMA operation on up to six ports
X USB host interface with two EHCI high-speed USB 2.0 Host
controllers and two rate matching hubs provide support for
up to fourteen USB 2.0 ports
X Integrated 10/100/1000 Gigabit Ethernet MAC with System
Defense
X System Management Bus (SMBus) Specification, Version
2.0 with additional support for I2C devices
X Supports Intel® High Definition Audio
X Supports Intel® Rapid Storage Technology
X Supports Intel® Virtualization Technology for Directed I/O
X Integrated Clock Controller
X Analog and Digital Display ports
X Low Pin Count (LPC) interface
X Firmware Hub (FWH) interface support
X Serial Peripheral Interface (SPI) support
3.3 PMC/XMC
The cPCI-3510P/S/T models support one PMC or XMC site for
front panel I/O expansion. The PMC site provides a maximum
32-bit/66MHz PCI bus link using a Pericom PI7C9X130
PCI-Express-to-PCI bridge and PCI-Express x1 link. The PMC site
supports +3.3V signaling only. The XMC site provides a PCI
Express x1 lane.