Altera DSP Development Kit, Stratix & Stratix Professional Edition Getting Started User Manual
Page 19
Altera Corporation
Development Kit Version 1.3.0
2–7
December 2004
DSP Development Kit, Stratix & Stratix Professional Edition Getting Started Guide
Getting Started
4.
Click OK. The DSPBuilder v2.2.1 - InstallShield Wizard dialog box
appears. Follow the on-line instructions to finish installation.
1
The DSP Builder software license included with the DSP
Development Kit, Stratix Edition and the DSP Development Kit,
Stratix Professional Edition is a perpetual license with free
software upgrades for the first 12 months. After 12 months, you
must purchase a renewal subscription for access to future
software upgrades. For more information, refer to the Altera
web site at www.altera.com.
1
DSP Builder launches the LeonardoSpectrum, Synplify Pro, or
Quartus II software by retrieving the software’s path
information from your PC’s registry file. If you have installed
multiple versions of these software products, the registry may
not point to the version you want to use with DSP Builder. In
DSP Builder you can specify a path to use other than the registry
setting for each of the tools.
f
For information on specifying the paths, see the Specifying Precision RTL
Synthesis, LeonardoSpectrum, Synplify & Quartus II Path Information for
SignalCompiler section in the Troubleshooting chapter in the DSP Builder
User Guide.
When you have finished installing DSP Builder, view DSP Builder
libraries in the MATLAB software by performing the remaining steps.
5.
Start the MATLAB software.
6.
At the MATLAB command prompt, change directory to the DSP
Builder\altlib
directory and type the following:
setup_dspbuilder
r
7.
Expand the Simulink icon in the Launch Pad window.
8.
Double-click the Library Browser icon. The Altera DSP Builder
folder appears in the Simulink Library Browser window.
f
For information on the DSP Builder directory structure, see the DSP
Builder User Guide. The DSP Builder User Guide also includes a tutorial
that describes how to create a design in Simulink and then convert it to
VHDL for synthesis, Quartus II compilation, and RTL simulation.