UM007715-0415
Index
eZ80
®
CPU
User Manual
396
F
f 33, 39, 247, 282
full 24-bit address mode 1
H
Half-Carry Flag 17, 386
HALT 148
Halt 148
HALT mode 3, 148
Hexadecimal Values viii
I
IEF1 bit flag 11, 12, 13, 14, 36, 61, 73, 140, 142,
300, 386
IEF2 11, 12, 13, 14, 16, 36, 37, 38, 39, 40, 41, 59,
66, 73, 140, 142, 189, 193, 195, 300, 386
IEF2, purpose of 36
IEF2, temporary storage location 36
IM 0 38
IM 0, Op Code Map 378
IM 1 38, 40
IM 1, Op Code Map 378
IM 2 38
IM 2, Op Code Map 378
IM n 149
IN A, (n) 150
IN instruction 47, 51
IN r, (BC) 151
IN0 r, (n) 153
INC (HL) 155
INC (IX/Y + d) 158
INC instruction 4, 48
INC ir 156
INC IX/Y 157
INC r 159
INC rr 161
INC SP 162
Increment 155, 156, 157, 158, 159, 161, 162
IND 163
IND2 164
IND2R 165
Index registers 48, 50
INDM 167
INDMR 168
INDR 169
INDRX 170
INI 171
INI2 172
INI2R 173
INIM 175
INIMR 176
INIR 177
INIRX 178
Initial Uppercase Letters, Use of ix
Input from I/O 150, 151, 153
Input from I/O and Decrement 163, 164, 167
Input from I/O and Decrement with Repeat 165,
168, 169
Input from I/O and Increment 171, 172, 175
Input from I/O and Increment with Repeat 173, 176,
177
instruction delay 36
Instruction Fetch 2
instruction fetch block 2
Instruction Stream Long suffix 19
Instruction Stream Short suffix 19
Instruction Summary 59
Intended Audience vi
interrupt acknowledge cycle 38, 41, 149, 387
Interrupt Enable Flag 11, 59, 387
Interrupt Enable Flags 36
Interrupt Mode 57
Interrupt mode 3
interrupt mode 38
Interrupt Mode 0 38
Interrupt Mode 1 40
Interrupt Mode 2 41
interrupt mode instructions 38
interrupt mode, maskable 38
Interrupt Mode, Set 149
interrupt service routine 9, 36, 37, 38, 39, 40, 41
interrupt vector address 41, 387
Interrupts in Mixed Memory Mode Applications 36
ISR 36
J
JP 35