Zilog EZ80F916 User Manual
Page 54
eZ80
®
CPU
User Manual
UM007715-0415
Interrupts
45
Z80 Mode
0
1
Read the LSB of the interrupt vector placed on the internal
vectored interrupt bus, IVECT[8:0], bus by the interrupting
peripheral.
•
IEF1 0
•
IEF2 0
•
The starting Program Counter is effectively {MBASE,
PC[15:0]}.
•
Push the 2-byte return address, PC[15:0], onto the SPL
stack.
•
Push a 00h byte onto the SPL stack to indicate an interrupt
from Z80 mode (because ADL = 0).
•
Set the ADL mode bit to 1.
•
The interrupt vector address is located at { I[15:1],
IVECT[8:0] }.
•
PC[23:0] ( { I[15:1], IVECT[8:0] } ).
•
The ending Program Counter is { PC[23:0] }.
•
The interrupt service routine must end with RETI.L
ADL Mode
1
1
Read the LSB of the interrupt vector placed on the internal
vectored interrupt bus, IVECT [8:0], by the interrupting
peripheral.
•
IEF1 0
•
IEF2 0
•
The starting Program Counter is PC[23:0].
•
Push the 3-byte return address, PC[23:0], onto the SPL
stack.
•
Push a 01h byte onto the SPL stack to indicate a restart
from ADL mode (because ADL = 1).
•
The ADL mode bit remains set to 1.
•
The interrupt vector address is located at {I[15:1],
IVECT[8:0]}.
•
PC[23:0] ( { I[15:1], IVECT[8:0] } ).
•
The ending Program Counter is { PC[23:0] }.
•
The interrupt service routine must end with RETI.L
Table 25. Vectored Interrupt Operation (Continued)
Memory Mode
ADL
Bit
MADL
Bit
Operation