Zilog Z08470 - Manual (Page 241)

UM008007-0715 Z80 Instruction Description
Z80 CPU
User Manual
229
r identifies registers B, C, D, E, H, L, or A assembled as follows in the object code field:
Description
An arithmetic shift left 1 bit position is performed on the contents of operand m. The con-
tents of bit 7 are copied to the Carry flag. Bit 0 is the least-significant bit.
Condition Bits Affected
S is set if result is negative; otherwise, it is reset.
Z is set if result is 0; otherwise, it is reset.
H is reset.
P/V is set if parity is even; otherwise, it is reset.
N is reset.
C is data from bit 7.
Example
Register L contains the following data.
Register r
B
000
C
001
D
010
E
011
H
100
L
101
A
111
Instruction M Cycles T States 4 MHz E.T.
SLA r 2 8 (4, 4) 2.00
SLA (HL) 4 15 (4, 4, 4, 3) 3.75
SLA (IX+d) 6 23 (4, 4, 3, 5, 4, 3) 5.75
SLA (IY+d) 6 23 (4, 4, 3, 5, 4, 3) 5.75
1 0 1 0 1 0 1 0
7 6 4 1 0 2 5 3